Abstract: A method of manufacturing a semiconductor device includes the following processes. A metal film forming process in which a metal film including cobalt is formed on a surface of silicon. A cap film forming process in which a cap film including titanium is formed on a surface of the metal film. A first thermal processing process in which a cobalt silicide is formed at a specific location of the semiconductor substrate by heating the semiconductor substrate at a first temperature. A second thermal processing process in which the semiconductor substrate is heated at a second temperature higher than the first temperature in nitrogen atmosphere. A removal process in which the cap film and unreacted cobalt are removed. A third thermal processing process in which the cobalt silicide is caused to phase transition by heating the semiconductor substrate at a third temperature higher than the second temperature.

Abstract: A method of manufacturing a semiconductor device includes: forming a first metal film on an insulating film over a substrate; forming a capacitor lower electrode by patterning the first metal film; and forming a dielectric film on upper and side surfaces of the capacitor lower electrode and on the insulating film. The method further includes: forming a conductive protection film on the dielectric film; patterning the conductive protection film into a shape of covering the capacitor lower electrode; forming a capacitor dielectric film in a shape of covering the upper and side surfaces of the capacitor lower electrode, by patterning the dielectric film so that the patterned conductive protection film covers an upper surface of the capacitor dielectric film; forming a second metal film on the patterned conductive protection film; and forming a capacitor upper electrode that covers at least an upper surface of the patterned conductive protection film.

Abstract: A semiconductor device includes a substrate, an insulating film formed over the substrate, first and second conductive plugs formed in the insulating film, a capacitor element, and a wiring. The capacitor element includes a lower electrode, a dielectric film, and an upper electrode. The lower electrode is connected to an end of the first plug and formed on the insulating film, and includes a first barrier film. The dielectric film is formed on upper and side surfaces of the lower electrode. The upper electrode is formed on the dielectric film, and includes a second barrier metal film being wider than the lower electrode. The wiring is connected to an end of the second plug and formed on the insulating film, and includes a first layer and a second layer formed on the first layer. The first and second layers include the first and second barrier metal films, respectively.

Abstract: A liquid crystal panel 10, a multilayer polarization plate 20, and a cover member such as a touch panel 30, a cover glass, or the like are laminated in this order to form a liquid crystal display device 1. The multilayer polarization plate 20 and the liquid crystal panel 10 are attached together by an adhesive layer 24 formed on one surface of the multilayer polarization plate 20. The multilayer polarizing plate 20 and the cover member are attached together by an adhesive layer 26 formed on the other surface of the multilayer polarization plate 20. The adhesive layers 24 and 26 are respectively covered by separators 25 and 27.

Abstract: A semiconductor device includes a substrate, an insulating film formed over the substrate, first and second conductive plugs formed in the insulating film, a capacitor element, and a wiring. The capacitor element includes a lower electrode, a dielectric film, and an upper electrode. The lower electrode is connected to an end of the first plug and formed on the insulating film, and includes a first barrier film. The dielectric film is formed on upper and side surfaces of the lower electrode. The upper electrode is formed on the dielectric film, and includes a second barrier metal film being wider than the lower electrode. The wiring is connected to an end of the second plug and formed on the insulating film, and includes a first layer and a second layer formed on the first layer. The first and second layers include the first and second barrier metal films, respectively.

Abstract: Above a semiconductor substrate on which switching semiconductor elements are formed respectively corresponding to a plurality of pixels, a first and a second copper wiring layers and thereon an aluminum reflection electrode layer are arranged. Wirings and first and second light shielding layers are formed by patterning the copper wiring layers and pluralities of first and second openings are formed respectively in the first and the second light shielding layers. The first openings and the second openings are shifted in two directions not to overlap each other in a plan view. The wiring layers and the light shielding layers are formed of copper while restraining dishing.

Abstract: A semiconductor device includes a substrate, an insulating film formed over the substrate, first and second conductive plugs formed in the insulating film, a capacitor element, and a wiring. The capacitor element includes a lower electrode, a dielectric film, and an upper electrode. The lower electrode is connected to an end of the first plug and formed on the insulating film, and includes a first barrier film. The dielectric film is formed on upper and side surfaces of the lower electrode. The upper electrode is formed on the dielectric film, and includes a second barrier metal film being wider than the lower electrode. The wiring is connected to an end of the second plug and formed on the insulating film, and includes a first layer and a second layer formed on the first layer. The first and second layers include the first and second barrier metal films, respectively.

Abstract: A semiconductor device includes a substrate having first and second device regions separated from each other by a device isolation region, a first field effect transistor having a first polysilicon gate electrode and formed in the first device region, a second field effect transistor having a second polysilicon gate electrode and formed in the second device region, a polysilicon pattern extending over the device isolation region from the first polysilicon gate electrode to the second polysilicon gate electrode, and a silicide layer formed on a surface of the first polysilicon gate electrode, a surface of said the polysilicon gate electrode and a surface of the polysilicon pattern so as to extend on the polysilicon pattern from the first polysilicon gate electrode to the second polysilicon gate electrode, the silicide layer having a region of increased film thickness on the polysilicon pattern, wherein the silicide layer has a surface protruding upward in the region of increased film thickness.

Abstract: A semiconductor device includes a substrate having first and second device regions separated from each other by a device isolation region, a first field effect transistor having a first polysilicon gate electrode and formed in the first device region, a second field effect transistor having a second polysilicon gate electrode and formed in the second device region, a polysilicon pattern extending over the device isolation region from the first polysilicon gate electrode to the second polysilicon gate electrode, and a silicide layer formed on a surface of the first polysilicon gate electrode, a surface of said the polysilicon gate electrode and a surface of the polysilicon pattern so as to extend on the polysilicon pattern from the first polysilicon gate electrode to the second polysilicon gate electrode, the silicide layer having a region of increased film thickness on the polysilicon pattern, wherein the silicide layer has a surface protruding upward in the region of increased film thickness.

Abstract: A semiconductor device includes a substrate having first and second device regions separated from each other by a device isolation region, a first field effect transistor having a first polysilicon gate electrode and formed in the first device region, a second field effect transistor having a second polysilicon gate electrode and formed in the second device region, a polysilicon pattern extending over the device isolation region from the first polysilicon gate electrode to the second polysilicon gate electrode, and a silicide layer formed on a surface of the first polysilicon gate electrode, a surface of said the polysilicon gate electrode and a surface of the polysilicon pattern so as to extend on the polysilicon pattern from the first polysilicon gate electrode to the second polysilicon gate electrode, the silicide layer having a region of increased film thickness on the polysilicon pattern, wherein the silicide layer has a surface protruding upward in the region of increased film thickness.

Abstract: A semiconductor device formed on a SOI substrate includes isolation trenches formed in a first region and reaching an insulation layer buried in the SOI substrate, and alignment marks formed in a second region and consisting of grooves extending into a support substrate.

Abstract: A semiconductor device includes a substrate having first and second device regions separated from each other by a device isolation region, a first field effect transistor having a first polysilicon gate electrode and formed in the first device region, a second field effect transistor having a second polysilicon gate electrode and formed in the second device region, a polysilicon pattern extending over the device isolation region from the first polysilicon gate electrode to the second polysilicon gate electrode, and a silicide layer formed on a surface of the first polysilicon gate electrode, a surface of said the polysilicon gate electrode and a surface of the polysilicon pattern so as to extend on the polysilicon pattern from the first polysilicon gate electrode to the second polysilicon gate electrode, the silicide layer having a region of increased film thickness on the polysilicon pattern, wherein the silicide layer has a surface protruding upward in the region of increased film thickness.

Abstract: There is provided a semiconductor device able to prevent performance degradation of an inductor element provided thereon. A high resistance region is provided below the inductor element formed on the semiconductor substrate. The high resistance region is formed deeper than the well regions of the p-channel and n-channel MOS transistors, thus preventing induction of an eddy current by the magnetic flux generated from the inductor element.

Abstract: A semiconductor device formed on a SOI substrate includes isolation trenches formed in a first region and reaching an insulation layer buried in the SOI substrate, and alignment marks formed in a second region and consisting of grooves extending into a support substrate.

Abstract: A semiconductor device formed on a SOI substrate includes isolation trenches formed in a first region and reaching an insulation layer buried in the SOI substrate, and alignment marks formed in a second region and consisting of grooves extending into a support substrate.

Abstract: There is provided a semiconductor device able to prevent performance degradation of an inductor element provided thereon. A high resistance region is provided below the inductor element formed on the semiconductor substrate. The high resistance region is formed deeper than the well regions of the p-channel and n-channel MOS transistors, thus preventing induction of an eddy current by the magnetic flux generated from the inductor element.

Abstract: A resist pattern is formed on a silicon oxide film. This resist pattern is formed in such a shape to expose only portions necessary for electrical insulation between bit lines adjacent to each other. In other words, here, these portions are a connection hole forming region in which a contact hole of the bit line is formed and a connection hole forming region in which a contact hole of a word line is formed. Using this resist pattern as a mask, an insulation region is formed by full anisotropic etching of the silicon oxide film. Siliciding is performed in this state and silicide is formed on a surface of the bit line exposed to the connection hole forming region and a surface of a source/drain in an active region of a peripheral circuit.

Abstract: A semiconductor device formed on a SOI substrate includes isolation trenches formed in a first region and reaching an insulation layer buried in the SOI substrate, and alignment marks formed in a second region and consisting of grooves extending into a support substrate.