Patents by Inventor Tetsuo Yoshino

Tetsuo Yoshino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7958478
    Abstract: A production method for a semiconductor integrated circuit includes: creating a model parameter of an element constituting a cell, wherein the model parameter is defined by a design value and a distribution function of variability from the design value; performing a circuit simulation using the model parameter to create a response function that expresses response of cell characteristic to the model parameter; and creating a statistical cell library by using the response function. The statistical cell library used for circuit design and verification gives an expected value and statistical variation of the cell characteristic. The statistical variation is expressed by a product of the distribution function and sensitivity. The sensitivity is calculated based on the response function. When the model parameter is updated, the statistical cell library is updated by using the post-update model parameter and the response function without performing a circuit simulation.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: June 7, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Toshiyuki Saito, Tetsuo Yoshino
  • Publication number: 20090019408
    Abstract: A production method for a semiconductor integrated circuit includes: creating a model parameter of an element constituting a cell, wherein the model parameter is defined by a design value and a distribution function of variability from the design value; performing a circuit simulation using the model parameter to create a response function that expresses response of cell characteristic to the model parameter; and creating a statistical cell library by using the response function. The statistical cell library used for circuit design and verification gives an expected value and statistical variation of the cell characteristic. The statistical variation is expressed by a product of the distribution function and sensitivity. The sensitivity is calculated based on the response function. When the model parameter is updated, the statistical cell library is updated by using the post-update model parameter and the response function without performing a circuit simulation.
    Type: Application
    Filed: July 10, 2008
    Publication date: January 15, 2009
    Applicant: NEC Electronics Corporation
    Inventors: Toshiyuki Saito, Tetsuo Yoshino
  • Patent number: 4754175
    Abstract: A solid state relay comprises a light-emitting diode (2) for generating radiation in response to forward current supplied thereto and an array (5) of photodiodes optically coupled to the light-emitting diode for generating a voltage in response to radiation from the light-emitting diode. A thyristor (18) is provided having anode and cathode coupled to the gate and substrate electrodes (11a, 11b, 14a, 14b) of a field-effect transistor, respectively. A gate electrode (21) of the thyristor is connected to one end (7) of the photodiode array (5) and the cathode of the thyristor is further connected to the other end (8 ) of the photodiode array. The voltage generated by the photodiode array is applied to the switching transistor (9, 10) through a diode (17) so that the impedance between the source and drain electrodes of the transistor has a low value in the presence of the voltage and a high value in the absence of the voltage.
    Type: Grant
    Filed: December 3, 1986
    Date of Patent: June 28, 1988
    Assignee: NEC Corporation
    Inventors: Shigeki Kobayashi, Kenji Ogawa, Tetsuo Yoshino
  • Patent number: 4302687
    Abstract: A semiconductor (preferably a thyristor) switch has characteristics that can be represented by an equivalent circuit including an interconnected pair of opposite conductive types of transistors. The base terminals of these transistors represent anode and cathode gate electrodes of the thyristors. An amplifier which is free from erroneous actions due to the impression of a transitional voltage is connected to an electrode of the thyristor, which corresponds to the base terminal of an equivalent transistor of a first conductive type, in order to supply a gate current. A resistor across the base-emitter junction of an equivalent transistor of a second conductive type has a sufficiently low-resistance value to satisfy a predetermined dv/dt-bearing capacity. Therefore, a sustaining gate current is provided responsive to an amplification of the input to the amplifying means.
    Type: Grant
    Filed: April 18, 1979
    Date of Patent: November 24, 1981
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Tetsuo Yoshino, Tsuyotake Sawano, Tokuo Takeuchi
  • Patent number: 4264786
    Abstract: An A.C. signalling transmission trunk circuit has a single-polarity drive voltage source for controlling a pair of thyristor-switching circuits which are assigned, respectively, to a subscriber line pair. The voltage source is arranged to supply either a positive or negative half-wave A.C. signal voltage over one side of the subscriber line to one of the thyristor-switching circuits. Another half-wave A.C. drive voltage of the same polarity (but 180 degrees out of phase) is applied over the other side of the subscriber line to the other of the thyristor-switching circuits. The instantaneous potentials on the two sides of the subscriber lines have single polarity--either a positive or a negative potential--while supplying the A.C. signal to the subscriber set.
    Type: Grant
    Filed: January 31, 1979
    Date of Patent: April 28, 1981
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Tetsuo Yoshino, Tsuyotake Sawano
  • Patent number: 4135136
    Abstract: An improvement in an electromagnetic switch matrix permits the simultaneous closing of a plurality of cross-points either in the same row or in the same column without causing the erroneous operation of nonselected cross-points. The switch matrix is of the divisionally excited type having a magnetic shunt plate with sealed switches disposed in through apertures therein at cross-point locations. First, second, third and fourth windings are wound around the sealed switches so as to generate control magnetic fields for controlling the operations of the respective sealed switches. An asymmetrical magnetization is given to the sealed switches with respect to the top and bottom planes so that there is a difference in the magnetization of the sealed switches on either side of the shunt plate when driven by the windings.
    Type: Grant
    Filed: June 10, 1977
    Date of Patent: January 16, 1979
    Assignee: Nippon Electric Co., Ltd.
    Inventors: Kazuyoshi Nago, Sadayuki Mitsuhashi, Tetsuo Yoshino