Abstract: Provided is a technology for obtaining a drain current of a sufficient magnitude in a field effect transistor using a nitride semiconductor. A channel layer that is Alx1Iny1Ga1-x1-y1N is formed on an upper surface of a semiconductor substrate, and on an upper surface of the channel layer, a barrier layer that is Alx2Iny2Ga1-x2-y2N having a band gap larger than that of the channel layer is formed. Then, on an upper surface of the barrier layer, a gate insulating film that is an insulator or a semiconductor and has a band gap larger than that of the barrier layer is at least partially formed, and a gate electrode is formed on an upper surface of the gate insulating film. Then, heat treatment is performed while a positive voltage is applied to the gate electrode.

Abstract: A semiconductor device includes a supporting substrate, a first GaN layer of a first conductivity type provided on the side of a first main surface of the supporting substrate, a second GaN layer of the first conductivity type provided on the first GaN layer, an AlxGa1?xN layer provided on the second GaN layer, a third GaN layer of a second conductivity type provided on the AlxGa1?xN layer, a fourth GaN layer of the first conductivity type provided on the third GaN layer, an insulating film covering a top of the fourth GaN layer, a trench gate reaching the inside of the second GaN layer, a gate electrode, a first main electrode connected to the third GaN layer, and a second main electrode, and the donor concentration of the third GaN layer is lower than that of the fourth GaN layer.

Abstract: A semiconductor device includes a supporting substrate, a first GaN layer of a first conductivity type provided on the side of a first main surface of the supporting substrate, a second GaN layer of the first conductivity type provided on the first GaN layer, an AlxGa1?xN layer provided on the second GaN layer, a third GaN layer of a second conductivity type provided on the AlxGa1?xN layer, a fourth GaN layer of the first conductivity type provided on the third GaN layer, an insulating film covering a top of the fourth GaN layer, a trench gate reaching the inside of the second GaN layer, a gate electrode, a first main electrode connected to the third GaN layer, and a second main electrode, and the donor concentration of the third GaN layer is lower than that of the fourth GaN layer.

Abstract: A first insulating layer is disposed on a second surface of a semiconductor substrate, and has an opening. A second insulating layer is disposed on the second surface and separated from the first insulating layer. A stack includes, in sequence on the second surface, a side n-type epitaxial layer and first and second p-type epitaxial layers that are made of a gallium-nitride-based material. The stack has an outer side wall having a portion formed of the second p-type epitaxial layer, an inner side wall extending from the second insulating layer, and a top surface. The n-type contact layer is disposed on the top surface. The source electrode portion is in contact with the n-type contact layer on the top surface, and is in contact with the second p-type epitaxial layer on the outer side wall. A gate insulating film is disposed on the inner side wall.

Abstract: A substrate is made of gallium-nitride-based material. The n-type layer is disposed on a first surface of the substrate. A p-type layer is disposed on the n-type layer, and constitutes, along with the n-type layer, a semiconductor layer on the first surface of the substrate, the semiconductor layer being provided with a mesa shape having a bottom surface, a side surface, and a top surface. An anode electrode is disposed on the p-type layer. A cathode electrode is disposed on a second surface of the substrate. An insulating film continuously extends over the bottom surface and the top surface to cover the side surface. The top surface is provided with at least one trench. The at least one trench includes a trench filled with the insulating film.

Abstract: Provided is a technology for obtaining a drain current of a sufficient magnitude in a field effect transistor using a nitride semiconductor. A channel layer that is Alx1Iny1Ga1-x1-y1N is formed on an upper surface of a semiconductor substrate, and on an upper surface of the channel layer, a barrier layer that is Alx2Iny2Ga1-x2-y2N having a band gap larger than that of the channel layer is formed. Then, on an upper surface of the barrier layer, a gate insulating film that is an insulator or a semiconductor and has a band gap larger than that of the barrier layer is at least partially formed, and a gate electrode is formed on an upper surface of the gate insulating film. Then, heat treatment is performed while a positive voltage is applied to the gate electrode.

Abstract: A substrate is made of gallium-nitride-based material. The n-type layer is disposed on a first surface of the substrate. A p-type layer is disposed on the n-type layer, and constitutes, along with the n-type layer, a semiconductor layer on the first surface of the substrate, the semiconductor layer being provided with a mesa shape having a bottom surface, a side surface, and a top surface. An anode electrode is disposed on the p-type layer. A cathode electrode is disposed on a second surface of the substrate. An insulating film continuously extends over the bottom surface and the top surface to cover the side surface. The top surface is provided with at least one trench. The at least one trench includes a trench filled with the insulating film.

Abstract: A first insulating layer is disposed on a second surface of a semiconductor substrate, and has an opening. A second insulating layer is disposed on the second surface and separated from the first insulating layer. A stack includes, in sequence on the second surface, a side n-type epitaxial layer and first and second p-type epitaxial layers that are made of a gallium-nitride-based material. The stack has an outer side wall having a portion formed of the second p-type epitaxial layer, an inner side wall extending from the second insulating layer, and a top surface. The n-type contact layer is disposed on the top surface. The source electrode portion is in contact with the n-type contact layer on the top surface, and is in contact with the second p-type epitaxial layer on the outer side wall. A gate insulating film is disposed on the inner side wall.

Abstract: A solar cell is provided that includes: a solar-battery cell that has a pn junction; a light-receiving-surface side electrode that includes a plurality of grid electrodes that are provided so as to extend in one direction at a given spacing on a light receiving surface of the solar-battery cell, and that collect a photoelectrically-converted charge; and a back-surface electrode that is provided on a back surface that opposes to the light receiving surface of the solar-battery cell. The grid electrode includes a first seed surface that comes into contact with the light receiving surface of the solar-battery cell, a second seed surface that is upright to the first seed surface, and is connected to the first seed surface, and a plated layer that comes into contact with the first seed surface and the second seed surface.