Patents by Inventor Tetsuro Muragana

Tetsuro Muragana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4967371
    Abstract: A method of inference using frame-based knowledge representation which enable the simultaneous realization of high accuracy and high speed in the process of inference is disclosed. The method includes the steps of accompanying each slot with procedure information which indicates procedure for deriving the slot value of the slot from the other slot values, providing pointer information indicating the slots related to each other by the procedure indicated by the procedure information, accompanying each slot with sign information which indicates the validity of the slot value currently given, deriving the slot value in accordance with the procedure indicated by the procedure information when the slot value is missing and when the slot value is indicated by the accompanying sign information as invalid, changing the indication of the sign information accompanying the slots which are indicated by the pointer information as being related to the slot whose slot value is derived, and caching in the derived slot value.
    Type: Grant
    Filed: November 17, 1988
    Date of Patent: October 30, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuro Muragana, Hideyuki Tsutsumitake