Abstract: A current driving circuit includes: a reference input terminal to which a first reference current is given; a current mirror circuit for receiving the first reference current and outputting a first internal current corresponding to the first reference current; a bias voltage generation section for receiving the first internal current and generating a bias voltage corresponding to the first internal current; an output reference current generation section for receiving the bias voltage and generating a second reference current corresponding to the bias voltage; a reference current output terminal for outputting the second reference current; an internal current generation transistor for receiving at a gate thereof the bias voltage and generating a second internal current corresponding to the bias voltage; and an output current generation section for receiving the second internal current and generating n output currents corresponding to the second internal current.

Abstract: A voltage generating system has a first voltage generating device for generating a plurality of voltages between a maximum voltage and a minimum voltage as a first set of voltages, and a second voltage generating device for generating a plurality of voltages between the maximum voltage and the minimum voltage as a second set of voltages, the second set of voltages being different from the first set of voltages. The first voltage generating device generates the maximum voltage, and supplies the first set of voltages and the maximum voltage to the second voltage generating device. The second voltage generating device generates the minimum voltage, and supplies the second set of voltages and the minimum voltage to the first voltage generating device. The first and second voltage generating devices each select a voltage from the first and second sets of voltages, and output the selected voltage.

Abstract: A voltage generating system has a first voltage generating device for generating a plurality of voltages between a maximum voltage and a minimum voltage as a first set of voltages, and a second voltage generating device for generating a plurality of voltages between the maximum voltage and the minimum voltage as a second set of voltages, the second set of voltages being different from the first set of voltages. The first voltage generating device generates the maximum voltage, and supplies the first set of voltages and the maximum voltage to the second voltage generating device. The second voltage generating device generates the minimum voltage, and supplies the second set of voltages and the minimum voltage to the first voltage generating device. The first and second voltage generating devices each select a voltage from the first and second sets of voltages, and output the selected voltage.

Abstract: The first and second chips are provided side by side. The first chip includes: a current supply section for outputting a drive current, the current supply section including a current mirror; a current distribution MISFET; a current input MISFET for transmitting an electric current to the current supply section, the current input MISFET being connected to the current distribution MISFET; and a second current distribution MISFET. The current distribution MISFET and the second current distribution MISFET constitute a current mirror. The second chip includes a second current input MISFET which is connected to the second current distribution MISFET. The ratio between the W/L ratio of the current distribution MISFET and the W/L ratio of the current input MISFET connected thereto is the same in the first and second chips.

Abstract: A current driver includes a gate line having a first and second nodes, K driving transistors, a terminal and a voltage generation section. The terminal receives a first current. The voltage generation section generates a bias voltage according to a current value of the first current. The gate line receives, at one of the first and second nodes, the bias voltage generated by the voltage generation section. Gates of the K transistors are connected between the first and second nodes of the gate line. In the voltage generation section, the relationship between the first current and the bias voltage is adjusted in the first mode, according to a current value of an output current flowing in a first driving transistor of the K driving transistors, and in the second mode, according to a current value of an output current flowing in a second driving transistor of the K driving transistors.

Abstract: A driving voltage output circuit is provided for selectively outputting a positive driving voltage and a negative driving voltage. The driving voltage includes: an amplifier which amplifies and outputs, as a driving voltage, a selectively input positive or negative input signal; and a power supply voltage switching circuit which switches a power supply voltage to be supplied to the amplifier according to a polarity of the input signal.

Abstract: A current driver outputs an output current according to a reference current. The current driver includes: a current-voltage converter; a bias-voltage generating transistor; a differential amplifier; and a driving transistor. The converter has a given resistance value and is connected between a first node and a second node. The bias-voltage generating transistor is provided between the first and second nodes and connected in series with the converter. The amplifier outputs a voltage according to the difference between a voltage at an interconnecting node between the converter and the bias-voltage generating transistor and a voltage according to the reference current at a third node. The driving transistor is connected between an output current node outputting an output current and the second node and receives, at its gate, the voltage from the amplifier. The bias-voltage generating transistor receives, at its gate, the voltage from the amplifier.

Abstract: In a current driver, a gate of a first generating transistor, gates of K driving transistors, and a gate of a second generating transistor are connected to a gate line in this order. A first differential amplifier outputs a voltage determined according to the difference between a voltage from a first supply node and a voltage at the drain of the first generating transistor. A second differential amplifier outputs a voltage determined according to the difference between a voltage from a second supply node and a voltage at the drain of the second generating transistor. The gate of the first generating transistor receives the output of the first differential amplifier. The gate of the second generating transistor receives the output of the second differential amplifier.

Abstract: A voltage generating system has a first voltage generating device for generating a plurality of voltages between a maximum voltage and a minimum voltage as a first set of voltages, and a second voltage generating device for generating a plurality of voltages between the maximum voltage and the minimum voltage as a second set of voltages, the second set of voltages being different from the first set of voltages. The first voltage generating device generates the maximum voltage, and supplies the first set of voltages and the maximum voltage to the second voltage generating device. The second voltage generating device generates the minimum voltage, and supplies the second set of voltages and the minimum voltage to the first voltage generating device. The first and second voltage generating devices each select a voltage from the first and second sets of voltages, and output the selected voltage.

Abstract: A current driving circuit includes: a reference input terminal to which a first reference current is given; a current mirror circuit for receiving the first reference current and outputting a first internal current corresponding to the first reference current; a bias voltage generation section for receiving the first internal current and generating a bias voltage corresponding to the first internal current; an output reference current generation section for receiving the bias voltage and generating a second reference current corresponding to the bias voltage; a reference current output terminal for outputting the second reference current; an internal current generation transistor for receiving at a gate thereof the bias voltage and generating a second internal current corresponding to the bias voltage; and an output current generation section for receiving the second internal current and generating n output currents corresponding to the second internal current.

Abstract: The first and second chips are provided side by side. The first chip includes: a current supply section for outputting a drive current, the current supply section including a current mirror; a current distribution MISFET; a current input MISFET for transmitting an electric current to the current supply section, the current input MISFET being connected to the current distribution MISFET; and a second current distribution MISFET. The current distribution MISFET and the second current distribution MISFET constitute a current mirror. The second chip includes a second current input MISFET which is connected to the second current distribution MISFET. The ratio between the W/L ratio of the current distribution MISFET and the W/L ratio of the current input MISFET connected thereto is the same in the first and second chips.

Abstract: The first and second chips are provided side by side. The first chip includes: a current supply section for outputting a drive current, the current supply section including a current mirror; a current distribution MISFET; a current input MISFET for transmitting an electric current to the current supply section, the current input MISFET being connected to the current distribution MISFET; and a second current distribution MISFET. The current distribution MISFET and the second current distribution MISFET constitute a current mirror. The second chip includes a second current input MISFET which is connected to the second current distribution MISFET. The ratio between the W/L ratio of the current distribution MISFET and the W/L ratio of the current input MISFET connected thereto is the same in the first and second chips.

Abstract: A current driver includes a gate line having a first and second nodes, K driving transistors, a terminal and a voltage generation section. The terminal receives a first current. The voltage generation section generates a bias voltage according to a current value of the first current. The gate line receives, at one of the first and second nodes, the bias voltage generated by the voltage generation section. Gates of the K transistors are connected between the first and second nodes of the gate line. In the voltage generation section, the relationship between the first current and the bias voltage is adjusted in the first mode, according to a current value of an output current flowing in a first driving transistor of the K driving transistors, and in the second mode, according to a current value of an output current flowing in a second driving transistor of the K driving transistors.

Abstract: In a current driver, a gate of a first generating transistor, gates of K driving transistors, and a gate of a second generating transistor are connected to a gate line in this order. A first differential amplifier outputs a voltage determined according to the difference between a voltage from a first supply node and a voltage at the drain of the first generating transistor. A second differential amplifier outputs a voltage determined according to the difference between a voltage from a second supply node and a voltage at the drain of the second generating transistor. The gate of the first generating transistor receives the output of the first differential amplifier. The gate of the second generating transistor receives the output of the second differential amplifier.

Abstract: A current driver outputs an output current according to a reference current. The current driver includes: a current-voltage converter; a bias-voltage generating transistor; a differential amplifier; and a driving transistor. The converter has a given resistance value and is connected between a first node and a second node. The bias-voltage generating transistor is provided between the first and second nodes and connected in series with the converter. The amplifier outputs a voltage according to the difference between a voltage at an interconnecting node between the converter and the bias-voltage generating transistor and a voltage according to the reference current at a third node. The driving transistor is connected between an output current node outputting an output current and the second node and receives, at its gate, the voltage from the amplifier. The bias-voltage generating transistor receives, at its gate, the voltage from the amplifier.

Abstract: In a current drive system for current-driving a display panel such as an organic EL panel, display crosstalk caused by a bias-voltage variation due to induction from the display panel is prevented. For this prevention, the current drive system includes: a plurality of drivers for current-driving a plurality of display element circuits in the display panel; and a bias circuit with a low output impedance for generating a bias voltage and supplying the bias voltage to each of the drivers through a bias line. The output impedance of the bias circuit is set sufficiently low so that a voltage variation caused on the bias line due to switching operation of each switch in the drivers converges within a period during which display data is written.

Abstract: The first and second chips are provided side by side. The first chip includes: a current supply section for outputting a drive current, the current supply section including a current mirror; a current distribution MISFET; a current input MISFET for transmitting an electric current to the current supply section, the current input MISFET being connected to the current distribution MISFET; and a second current distribution MISFET. The current distribution MISFET and the second current distribution MISFET constitute a current mirror. The second chip includes a second current input MISFET which is connected to the second current distribution MISFET. The ratio between the W/L ratio of the current distribution MISFET and the W/L ratio of the current input MISFET connected thereto is the same in the first and second chips.

Abstract: In a current drive system for current-driving a display panel such as an organic EL panel, display crosstalk caused by a bias-voltage variation due to induction from the display panel is prevented. For this prevention, the current drive system includes: a plurality of drivers for current-driving a plurality of display element circuits in the display panel; and a bias circuit with a low output impedance for generating a bias voltage and supplying the bias voltage to each of the drivers through a bias line. The output impedance of the bias circuit is set sufficiently low so that a voltage variation caused on the bias line due to switching operation of each switch in the drivers converges within a period during which display data is written.