Abstract: The present invention relates to a domain name solution method in dynamic DNS and a device for domain name solution. A dynamic DNS server includes an address translation means which assigns a host a virtual address corresponding to an actual address of the host. The dynamic DNS registration method comprises a step in which the address translation means assigns a virtual address to the host upon a registration request issued from the host and a step of storing a tuple of the actual address, virtual address, and domain name of the host, which are associated with each other.

Abstract: A router apparatus 5 is provided with an ATM switch, an IP controller for performing routing control as a controller for layer 3, plural kinds of interfaces which are individually provided to plural transmission paths in which various communications are performed, and a cell multiplexing/demultiplexing unit, and manages the cell communications between respective parts on the basis of identification information. The input packet is subjected to IP processing in an interface to be converted to a cell in a common format, and the cell is serially multiplexed with a cell from another interface on a cell basis, and transmitted to the ATM switch at the cell multiplexing/demultiplexing unit. Each interface and each cell multiplexing/demultiplexing unit sets and switches the identification information for the header portion of the packet and the cell to be communicated by using a table in which the corresponding relationship of the identification information is registered.

Abstract: A packet communication apparatus is provided having a receiving port which receives first packets. A switch, switches the first packets received at the receiving port. A first packet transform section, receives, through the switch section, the first packets received by the receiving port, and assembles the first packets into a second packet. A packet processing section processes the second packet transformed from the first packets by the first packet transform section. A second packet transform section disassembles the second packet, processed by the packet processing section, into the first packets and sends the first packets to the switch. A sending port receives the first packets sent from the second packet transform section through the switch, and sends the first packets.

Abstract: A server 3b for controlling a gateway 2 connecting a transport layer and an IP network has the function of accessing a service control point (SCP) 4 via a service control gateway 1a. A server 3 for controlling terminals on the IP network stores information of correspondence between telephone number of a terminal and the IP address. When a signal including number information which requires an access to the SCP is received from a terminal 11 managed by the server 3a, an interrogation request is multicasted to the other servers each having the function of accessing the SCP. A server which has sent a response signal accesses the SCP via the service control gateway to provide an IN service process.

Abstract: A memory card includes a first nonvolatile memory, a second nonvolatile memory, and a separating portion. The first nonvolatile memory has a predetermined erase unit. The second nonvolatile memory has an erase unit that is larger than the erase unit of the first nonvolatile memory. The separating portion separates at least the portion of the program data that are downloaded onto the memory card that has the possibility of being rewritten, and stores the separated portion onto the first nonvolatile memory and stores the remaining portion onto the second nonvolatile memory.

Abstract: A packet transfer apparatus connected to an internal subnetwork formed by a set of broadcast segments each accommodating terminals and for transferring, when a MAC frame including a IP address which designates a destination terminal connected to one of the segments is received from a terminal connected to another segment in the internal subnetwork, an IP packet in the MAC frame to the segment connected to the destination terminal in accordance with a terminal management table which indicates a relation of address information of each of the terminals belonging to the internal subnetwork and the segment to which the terminal is connected.

Abstract: A method of providing web accessing service and a server apparatus for carrying out the method, wherein access from a user in a LAN to a search engine is monitored, and keyword information is stored. Then, based on the keyword information, the access to the search engine is made again by a web site storage server, and resulting contents of web sites are all stored in the web site storage server.

Abstract: A memory card includes a first nonvolatile memory, a second nonvolatile memory, and a separating portion. The first nonvolatile memory has a predetermined erase unit. The second nonvolatile memory has an erase unit that is larger than the erase unit of the first nonvolatile memory. The separating portion separates at least the portion of the program data that are downloaded onto the memory card that has the possibility of being rewritten, and stores the separated portion onto the first nonvolatile memory and stores the remaining portion onto the second nonvolatile memory.

Abstract: A memory card includes a nonvolatile memory chip and a controller chip. The controller chip includes a first encrypting portion and a second encrypting portion. The first encrypting portion decrypts data input to the memory card that have been encrypted using a first key that is different for each session, using the first key. The second encrypting portion encrypts the data that are decrypted by the first encrypting portion using a second key. The nonvolatile memory chip stores the data encrypted by the second encrypting portion.

Abstract: In a system in which communication is performed among a plurality of devices having a mechanism of disassembling a packet into ATM cells to send them and a plurality of devices having a mechanism of assembling the received ATM cells into the packet, a frame is prevented from being lost owing to change of virtual connections in the course of transferring the frame, improving reliability of the communication on the packet level.

Abstract: In a system in which communication is performed among a plurality of devices having a mechanism of disassembling a packet into ATM cells to send them and a plurality of devices having a mechanism of assembling the received ATM cells into the packet, a frame is prevented from being lost owing to change of virtual connections in the course of transferring the frame, improving reliability of the communication on the packet level. When the switch receives a request for change of switching, it does not processes that request at once, but confirms that the cell located at the boundary of the frame has been processed, before processing the change request, so as to protect the frame. When the switch receives a request for change of switching, it protects a frame by multicasting the cells to both destinations before change and after change, for a given period of time.

Abstract: A router apparatus 5 is provided with an ATM switch, an IP controller for performing routing control as a controller for layer 3, plural kinds of interfaces which are individually provided to plural transmission paths in which various communications are performed, and a cell multiplexing/demultiplexing unit, and manages the cell communications between respective parts on the basis of identification information. The input packet is subjected to IP processing in an interface to be converted to a cell in a common format, and the cell is serially multiplexed with a cell from another interface on a cell basis, and transmitted to the ATM switch at the cell multiplexing/demultiplexing unit. Each interface and each cell multiplexing/demultiplexing unit sets and switches the identification information for the header portion of the packet and the cell to be communicated by using a table in which the corresponding relationship of the identification information is registered.

Abstract: A state control circuit (107) gives an inactive state control signal (S2) to a CPU (105) and an active state control signal (S3) to a data transmission circuit (102). In response to this, the CPU (105) goes into the halt state and the data transmission circuit (102) goes into the receive state. When receive processing is completed, the state control circuit (107) gives an active state control signal (S2) to the CPU (105). In response to this, the CPU (105) restores from the halt state to the operative state. The CPU (105) gives an instruction signal (CMD2) to the state control circuit (107). The state control circuit (107) gives an inactive state control signal (S3) to the data transmission circuit (102). In response to this, the data transmission circuit (102) goes into the halt state.

Abstract: A router apparatus 5 is provided with an ATM switch, an IP controller for performing routing control as a controller for layer 3, plural kinds of interfaces which are individually provided to plural transmission paths in which various communications are performed, and a cell multiplexing/demultiplexing unit, and manages the cell communications between respective parts on the basis of identification information. The input packet is subjected to IP processing in an interface to be converted to a cell in a common format, and the cell is serially multiplexed with a cell from another interface on a cell basis, and transmitted to the ATM switch at the cell multiplexing/demultiplexing unit. Each interface and each cell multiplexing/demultiplexing unit sets and switches the identification information for the header portion of the packet and the cell to be communicated by using a table in which the corresponding relationship of the identification information is registered.

Abstract: An LAN interface unit and an ATM switch unit cooperate to perform traffic control. A QoS unit monitors circumstances of an input buffer from a multiplexer of the ATM switch by means of a system controller and when an overflow of the input buffer is expected, the LAN interface unit of the multiplexer is instructed to perform traffic control. The LAN interface unit performs traffic control such as limitation of ATM cells inputted in the ATM switch.

Abstract: In a system in which communication is performed among a plurality of devices having a mechanism of disassembling a packet into ATM cells to send them and a plurality of devices having a mechanism of assembling the received ATM cells into the packet, a frame is prevented from being lost owing to change of virtual connections in the course of transferring the frame, improving reliability of the communication on the packet level. When the switch receives a request for change of switching, it does not processes that request at once, but confirms that the cell located at the boundary of the frame has been processed, before processing the change request, so as to protect the frame. When the switch receives a request for change of switching, it protects a frame by multicasting the cells to both destinations before change and after change, for a given period of time.

Abstract: In a system in which communication is performed among a plurality of devices having a mechanism of disassembling a packet into ATM cells to send them and a plurality of devices having a mechanism of assembling the received ATM cells into the packet, a frame is prevented from being lost owing to change of virtual connections in the course of transferring the frame, improving reliability of the communication on the packet level.

Abstract: A router apparatus 5 is provided with an ATM switch, an IP controller for performing routing control as a controller for layer 3, plural kinds of interfaces which are individually provided to plural transmission paths in which various communications are performed, and a cell multiplexing/demultiplexing unit, and manages the cell communications between respective parts on the basis of identification information. The input packet is subjected to IP processing in an interface to be converted to a cell in a common format, and the cell is serially multiplexed with a cell from another interface on a cell basis, and transmitted to the ATM switch at the cell multiplexing/demultiplexing unit. Each interface and each cell multiplexing/demultiplexing unit sets and switches the identification information for the header portion of the packet and the cell to be communicated by using a table in which the corresponding relationship of the identification information is registered.

Abstract: An LAN interface unit and an ATM switch unit cooperate to perform traffic control. A QoS unit monitors circumstances of an input buffer from a multiplexer of the ATM switch by means of a system controller and when an overflow of the input buffer is expected, the LAN interface unit of the multiplexer is instructed to perform traffic control. The LAN interface unit performs traffic control such as limitation of ATM cells inputted in the ATM switch.