Abstract: In a storage having a nonvolatile RAM of destructive read type, the number of restorations attributed to data read from the nonvolatile RAM is decreased, and the overall life of the storage is prolonged. In a storage having a nonvolatile RAM of destructive read type and a volatile RAM and holding the same data in the nonvolatile and volatile RAMs, data is read out of the volatile RAM in reading and data is written in both volatile and nonvolatile RAMs in writing.

Abstract: A card information-storing portion is provided in a semiconductor memory card, and information relating to access performance such as access condition and access rate is held in the storing portion. Further, an access device acquires the held information from the semiconductor memory card to make it possible that the information can be used for control of a file system. This optimizes processing of the access device and the semiconductor memory card independent of differences in characteristics of semiconductor memory cards and management methods used, realizing high-rate access from the access device to a semiconductor memory card.

Abstract: For address management of a nonvolatile memory, the whole logical address space is divided into logical address ranges (0 to 15), and the physical address space is divided into physical areas (segments (0 to 15)). The logical address ranges are respectively associated with the physical areas (segments) to manage the addresses. The sizes of the logical address ranges are equalized. The size of the physical area (segment (0)) corresponding to the logical address range (0) in which data of high rewrite frequency such as an FAT is expected to be stored is larger than those of the other physical areas, and the logical address ranges and the physical areas are allocated. Alternatively, the sizes of the physical areas are equalized, and the size of the logical address range (0) is set as a smaller one than those of the other logical address ranges. With this, the actual rewrite frequencies of the physical areas (segments) are equal to one another, and consequently the life of the nonvolatile memory can be prolonged.

Abstract: A memory controller for reducing a time to create an address management table during initialization of a memory card. The memory controller includes a read-write memory for temporarily storing the address management table and a second memory controller for writing, in a nonvolatile memory, an address management table temporarily stored in the read-write memory. The second memory controller also writes address range specifying information that specifies an address range, when a data writing destination is changed from a first address range to a second address range. The memory controller includes an address management table generator for reading distributed management information used for managing a state of at least one physical block included in the destination address range specified by the address range specifying information during initialization, and to generate the address management table based on the distributed management information.

Abstract: With nonvolatile memory device employing a nonvolatile memory suc h as multiple-valued NAND flash memory or the like in which each memory cell holds data in a plurality of pages, there is such a problem that, if an error occurred under writing data, data stored in other page in the same group of the current page is changed, and hence the object of the present invention is to solve this problem. In writing data into a nonvolatile memory 110, when error occurred under writing data into a certain page, an error page identification part 128 identifies an error type and a physical address of the page where error occurred. An error corrector 129 then corrects errors occurred in other pages belonging to the same group of error occurrence page.

Abstract: A nonvolatile memory device includes a plurality of memory controllers. Each of the memory controllers has an aggregation processing part and an aggregation synchronization part. Based on a signal from the aggregation synchronization part, the aggregation processing part aggregates valid data of a temporary physical block into another physical block. When one of the memory controllers requires an aggregation process, the aggregation synchronization part sends a synchronization signal to the other memory controller, so that the aggregation process is simultaneously carried out by the other memory controller. Thus, in the nonvolatile memory device having a plurality of memory controllers, it is possible to reduce the time required for the aggregation process and carry out a high-speed writing process.

Abstract: An address at which a writing error occurs is held, and after a completion of a series of writings, the data of the held address is read. Then, a faulty-block processing is performed only for the addresses, for which it is determined that retry of writing is required, thereby preventing an increase of faulty-blocks. This can suppress the problem that when a writing is performed in a particular flash memory, a writing error frequently occurs and a large number of faulty blocks occur.

Abstract: When a control unit (160) in a storage device (100) detects that a write end command or a data amount to be written has been transmitted from a host device (110), the control unit (160) saves control information required for writing data in a control information save memory (142). The control unit (160) also saves data which has not been written in storage medium into a buffer save memory (152) from a data buffer (151) and releases the busy state for the host device (110). The control unit (160) writes the saved data into a storage medium (120). Even if the power is turned OFF before completion of write, write can be performed into the storage medium (120) by using the saved data when the power is turned ON next time.

Abstract: A semiconductor memory device in which data is not written in a transfer destination under a state including an error when an error occurs at the time of reading data at the transfer destination. The semiconductor memory device (1) comprising a nonvolatile memory (2) having a data writing unit smaller than a physical block is provided with an error detecting/correcting circuit (23) in the non-volatile memory (2). When data stored in a specified block of the non-volatile memory (2) is transferred to a different physical block and written, the error detecting/correcting circuit (23) performs error detection and correction of data.

Abstract: A nonvolatile storage device is provided with a nonvolatile main storage memory whose erase size is larger than a cluster size, and a buffer, i.e. a nonvolatile auxiliary storage memory. At the time of writing data in the memory, the data is temporarily stored in the buffer, then, a plurality of data in the buffer are collectively taken out to be stored in the main storage memory. Data in an original block is saved in a write block in the main storage memory. Thus, the data can be written in the main storage memory at a high speed.

Abstract: A host information memory is provided in a semiconductor memory card and a data write start address and a data size supplied by an access unit are stored. A free physical area generation section determines whether or not to perform erasing of an invalid block of a nonvolatile memory when writing of data based on the data write start address and data size, and determines the number of blocks to be erased. When erasing, writing of data and erasing of invalid blocks are simultaneously performed with respect to different memory chips. Erase process of data, herewith, can be optimized and high speed access from the access unit to a semiconductor memory card can be realized.

Abstract: A controller 102 and four flash memories F0 to F3 are connected by twos to two memory buses, and each flash memory is divided into two regions of substantially the same size to form a first half and a last half regions. In a four-memory configuration, a consecutive logical address specified by a host apparatus is divided into a predetermined size, and a write operation is performed in a format that repeatedly circulates through F0, F1, F2, F3 in this order. In a two-memory configuration, the write operation is performed in a format that repeatedly circulates through F00, F10, F01, F11. Thus, a controller processing is made common regardless of the number of flash memories connected to the controller.

Abstract: A memory card (1) includes a host interface (2) that transmits and receives a command and data to and from the data processor (50), a nonvolatile memory (7) that stores data, a controller (3) that controls the operation of the memory card, and a storage section (32) that stores specified management information. The management information includes retry setting information which specifies whether a retry function is executed or not when an error occurs during an operation of writing data to the nonvolatile memory. The controller (3) refers to the retry setting information in the data writing operation, and controls the data writing operation so as to disable the retry function in the event of an error in the data writing operation, when the retry setting information indicates disabling of the retry function or to enable the retry function in the event of an error in the data writing operation, when the retry setting information indicates enabling of the retry function.

Abstract: A writing completion flag table that stores a writing completion flag corresponding to a predetermined storage, such as a cluster or a physical block, is stored in a non-volatile control memory. When completion of data writing into a predetermined storage is detected, a write completion flag is written in the corresponding address of the storage on the write completion flag table. Thus, it is possible to recognize that data has been written normally. Even when the flag indicating completion of writing into a page of the writing unit of the main storage memory cannot be written, it is possible to improve the writing reliability.

Abstract: In rewriting processing of logical sectors, data of the transferred logical sectors are temporarily stored in a memory buffer. When the buffer memory has been full filled with data, the data is written into a flash memory. In rewriting processing for the flash memory including a writing unit (page) having a capacity larger than a minimum writing unit (sector) from outside, the number of executions of the evacuation processing can be reduced and the fast data rewriting can be performed. Thus, it is possible to rationalize the evacuation processing for old data caused in the rewriting in units of sectors and to improve the data rewriting speed.

Abstract: A nonvolatile storage device is provided with a nonvolatile main storage memory (114) whose erase size is larger than a cluster size, and a buffer (106), i.e. a nonvolatile auxiliary storage memory. At the time of writing data in the memory, the data is temporarily stored in the buffer (106), then, a plurality of data in the buffer (106) are collectively taken out to be stored in the main storage memory (114). Data in an original block is saved in a write block in the main storage memory. Thus, the data can be written in the main storage memory (114) at a high speed.

Abstract: For address management of a nonvolatile memory, the whole logical address space is divided into logical address ranges (0 to 15), and the physical address space is divided into physical areas (segments (0 to 15)). The logical address ranges are respectively associated with the physical areas (segments) to manage the addresses. The sizes of the logical address ranges are equalized. The size of the physical area (segment (0)) corresponding to the logical address range (0) in which data of high rewrite frequency such as an FAT is expected to be stored is larger than those of the other physical areas, and the logical address ranges and the physical areas are allocated. Alternatively, the sizes of the physical areas are equalized, and the size of the logical address range (0) is set as a smaller one than those of the other logical address ranges. With this, the actual rewrite frequencies of the physical areas (segments) are equal to one another, and consequently the life of the nonvolatile memory can be prolonged.

Abstract: When a control unit (160) in a storage device (100) detects that a write end command or a data amount to be written has been transmitted from a host device (110), the control unit (160) saves control information required for writing data in a control information save memory (142). The control unit (160) also saves data which has not been written in storage medium into a buffer save memory (152) from a data buffer (151) and releases the busy state for the host device (110). The control unit (160) writes the saved data into a storage medium (120). Even if the power is turned OFF before completion of write, write can be performed into the storage medium (120) by using the saved data when the power is turned ON next time.

Abstract: When a file system control part 155A writes file data into a main memory 142, a file can be easily written continuously and the number of file copy can be decreased at updating a directory entry by writing the file data and a directory entry into different allocation units. In this manner, when using a nonvolatile memory in which physical block size as an erase unit is larger than cluster size, the write performance can be enhanced.

Abstract: In a storage having a nonvolatile RAM of destructive read type, the number of restorations attributed to data read from the nonvolatile RAM is decreased, and the overall life of the storage is prolonged. In a storage having a nonvolatile RAM of destructive read type and a volatile RAM and holding the same data in the nonvolatile and volatile RAMs, data is read out of the volatile RAM in reading and data is written in both volatile and nonvolatile RAMs in writing.