Patents by Inventor Tetsuya Fujikawa

Tetsuya Fujikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7330220
    Abstract: An MVA liquid crystal display which is high in brightness and has preferable characteristics is provided. Further, the MVA liquid crystal display with a preferable display quality as well as a larger margin in fabrication and a higher yield is provided. A first substrate having a first electrode, a second substrate having a second electrode corresponding to a display pixel, the liquid crystal having negative dielectric anisotropy sealed between the first and the second substrates, and a structure which is provided at least the second substrate to control an alignment of the liquid crystal are provided. Also included is a storage capacitor wiring arranged under the structure on a side of the second substrate via an insulation film.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: February 12, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshinori Tanaka, Tetsuya Fujikawa, Shougo Hayashi
  • Publication number: 20070291200
    Abstract: By circular or polygonal openings formed in at least one of a metal film, a semiconductor film, an insulating film and the like, which films are below a reflecting electrode, minute irregularities are densely formed on a surface of the reflecting electrode. In this case, it is required that a linear density defined by peripheral dimensions of the openings per unit area is equal to 0.2 or more.
    Type: Application
    Filed: December 15, 2005
    Publication date: December 20, 2007
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Kunihiro Tashiro, Yasutoshi Tasaka, Hidefumi Yoshida, Yoshinori Tanaka, Seiji Doi, Tomoshige Oda, Manabu Sawasaki, Tomonori Tanose, Takashi Takagi, Isao Tsushima, Tetsuya Fujikawa, Norio Sugiura
  • Patent number: 7304699
    Abstract: A LCD panel is disclosed that provides improved performance of the frame area that surrounds the panel's display area. The frame area includes a transparent substrate, and color filters provided side-by-side on the transparent substrate, each of the color filters filtering one of at least two colors. The LCD panel is further constituted by a first electrode that counters the color filters, a second electrode that counters the first electrode, and liquid crystal that is inserted between the electrodes. Display spots are suppressed and the frame can appear in a desired color when the panel is in operation.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: December 4, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masahiro Ikeda, Manabu Sawasaki, Hidetoshi Sukenori, Tetsuya Fujikawa, Shiro Hirota
  • Patent number: 7304703
    Abstract: A vertically alignment mode liquid crystal display device having an improved viewing angle characteristic is disclosed. The disclosed liquid crystal display device uses a liquid crystal having a negative anisotropic dielectric constant, and orientations of the liquid crystal are vertical to substrates when no voltage being applied, almost horizontal when a predetermined voltage is applied, and oblique when an intermediate voltage is applied. At least one of the substrates includes a structure as domain regulating means, and inclined surfaces of the structure operate as a trigger to regulate azimuths of the oblique orientations of the liquid crystal when the intermediate voltage is applied.
    Type: Grant
    Filed: September 15, 2000
    Date of Patent: December 4, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Publication number: 20070252930
    Abstract: The liquid crystal display comprises a first substrate 2 including a gate bus line 12a, a data bus line 28, a thin film transistor 18 formed near an intersection between the gate bus line 12a and the data bus line 28, and a pixel electrode 52 including a transmission electrode 32a electrically connected to the thin film transistor 18 and a reflection electrode 48b electrically connected to the transmission electrode 32a; a second substrate 4 opposed to the first substrate 2 and including an opposed electrode 68 opposed to the pixel electrode 52; and a liquid crystal layer 6 sealed between the first substrate 2 and the second substrate 4. The reflection electrode 48b is formed over another gate bus line 12b which is different from the gate bus line 12a, with an insulation layer 40 formed therebetween. The decrease of a voltage applied between the reflection electrode 48b and the opposed electrode 68 can be prevented while the space which can be not used as the transmission region can be utilized.
    Type: Application
    Filed: April 9, 2007
    Publication date: November 1, 2007
    Inventors: Kunihiro Tashiro, Yasutoshi Tasaka, Katsufumi Ohmuro, Hidefumi Yoshida, Yoshinori Tanaka, Norio Sugiura, Seiji Doi, Manabu Sawasaki, Tomonori Tanose, Isao Tsushima, Tetsuya Fujikawa, Tomoshige Oda
  • Publication number: 20070211187
    Abstract: There is provided an MVA type liquid crystal display device having high brightness and excellent display quality.
    Type: Application
    Filed: January 18, 2006
    Publication date: September 13, 2007
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Katsunori Misaki, Tetsuya Fujikawa, Yoshihisa Taguchi, Kenichi Nagaoka, Manabu Sawasaki
  • Patent number: 7267912
    Abstract: An exposure mask which is capable of reducing non-uniformity in a display such as a liquid crystal display device. A first mask pattern having pattern-forming portions and shield portions mosaically arranged therein is formed in one end portion of an exposure mask, and a second mask pattern having pattern-forming portions and shield portions arranged in a manner complementary to the first mask pattern is formed at the other end portion of the exposure mask. The exposure mask is formed such that areas between vertically or laterally adjacent ones of the shield portions, in mosaic areas where pattern-forming portions and the shield portions are mosaically arranged, are also shielded.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: September 11, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tetsuya Fujikawa, Yoshinori Tanaka
  • Patent number: 7227606
    Abstract: A vertical alignment mode liquid crystal display device having an improved viewing angle characteristic is provided. The liquid crystal display device uses a liquid crystal having a negative anisotropic dielectric constant, and orientations of the liquid crystal are vertical to substrates when no voltage is applied, almost horizontal when a predetermined voltage is applied, and oblique when an intermediate voltage is applied. At least one of the substrates includes a structure as domain regulating means, and inclined surfaces of the structure operate as a trigger to regulate azimuths of the oblique orientations of the liquid crystal when the intermediate voltage is applied.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: June 5, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Patent number: 7224421
    Abstract: A vertical alignment mode liquid crystal display device having an improved viewing angle characteristic uses a liquid crystal having a negative anisotropic dielectric constant, and orientations of the liquid crystal are vertical to substrates when no voltage being applied, almost horizontal when a predetermined voltage is applied, and oblique when an intermediate voltage is applied. At least one of two substrates includes a structure as domain regulating means, to regulate azimuths of the oblique orientations of the liquid crystal when the intermediate voltage is applied.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: May 29, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Publication number: 20070109452
    Abstract: First and second sub-picture element electrodes, a buffer capacitance, and a first to third TFTs are formed in each picture element; the first and second TFTs are driven by a signal supplied to an nth gate bus line; the third TFT is driven by a signal supplied to an (n+1)th gate bus line; the first sub-picture element electrode is connected to the first and third TFTs; the second sub-picture element electrode is connected to the second TFT; a drain electrode of the third TFT is connected to an upper electrode of the buffer capacitance; and a lower electrode of this buffer capacitance is connected to the (n+1)th gate bus line.
    Type: Application
    Filed: May 26, 2006
    Publication date: May 17, 2007
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Shuntaro Kosugi, Tetsuya Fujikawa, Tsuyoshi Kamada
  • Publication number: 20070103607
    Abstract: The invention has an object to provide a liquid crystal display device of an excellent viewing angle characteristic and high brightness, including: sandwiching liquid crystals containing polymerizable monomers between a first substrate with a pixel electrode having a micro slit and a second substrate facing the first substrate; polymerizing the monomers with voltage applied to the liquid crystals; and controlling an alignment orientation of the liquid crystals to a direction of extending the micro slit, wherein the pixel electrode includes: a direct coupling part electrically connected to a switching element; a capacitive coupling part electrically insulated from the switching element, and forming capacitance with a control capacitance electrode having a same potential as that of a source electrode of the switching element; and a space between the direct and capacitive coupling parts, wherein directions of extending the micro slit in the adjacent direct and capacitive coupling parts are orthogonal to each oth
    Type: Application
    Filed: May 26, 2006
    Publication date: May 10, 2007
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Kazutaka Hanaoka, Katsufumi Ohmuro, Kunihiro Tashiro, Jin Hirosawa, Norio Sugiura, Kengo Kanii, Shota Makimoto, Yasuhiro Ohno, Isao Tsushima, Tomonori Tanose, Takashi Takagi, Tetsuya Fujikawa, Takahiro Sasaki
  • Patent number: 7212266
    Abstract: The liquid crystal display comprises a first substrate 2 including a gate bus line 12a, a data bus line 28, a thin film transistor 18 formed near an intersection between the gate bus line 12a and the data bus line 28, and a pixel electrode 52 including a transmission electrode 32a electrically connected to the thin film transistor 18 and a reflection electrode 48b electrically connected to the transmission electrode 32a; a second substrate 4 opposed to the first substrate 2 and including an opposed electrode 68 opposed to the pixel electrode 52; and a liquid crystal layer 6 sealed between the first substrate 2 and the second substrate 4. The reflection electrode 48b is formed over another gate bus line 12b which is different from the gate bus line 12a, with an insulation layer 40 formed therebetween. The decrease of a voltage applied between the reflection electrode 48b and the opposed electrode 68 can be prevented while the space which can be not used as the transmission region can be utilized.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: May 1, 2007
    Assignees: Fujitsu Limited, AU Optronics Corporation
    Inventors: Kunihiro Tashiro, Yasutoshi Tasaka, Katsufumi Ohmuro, Hidefumi Yoshida, Yoshinori Tanaka, Norio Sugiura, Seiji Doi, Manabu Sawasaki, Tomonori Tanose, Isao Tsushima, Tetsuya Fujikawa, Tomoshige Oda
  • Publication number: 20070064187
    Abstract: A vertically alignment mode liquid crystal display device having an improved viewing angle characteristic is disclosed. The disclosed liquid crystal display device uses a liquid crystal having a negative anisotropic dielectric constant, and orientations of the liquid crystal are vertical to substrates when no voltage being applied, almost horizontal when a predetermined voltage is applied, and oblique when an intermediate voltage is applied. At least one of the substrates includes a structure as domain regulating means, and inclined surfaces of the structure operate as a trigger to regulate azimuths of the oblique orientations of the liquid crystal when the intermediate voltage is applied.
    Type: Application
    Filed: November 16, 2006
    Publication date: March 22, 2007
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Patent number: 7190429
    Abstract: A liquid crystal display apparatus including pair of substrates; a liquid crystal arranged between the pair of substrates; a plurality of stripe electrodes per pixel and an alignment layer formed in one of the substrates; a transparent electrode covering substantially the whole surface of the other substrate and an alignment layer formed in the other substrate; and an insulating layer arranged in one substrate to cover the stripe electrodes. The insulating layer preferably has openings above the stripe electrodes and the openings preferably have tapered side walls.
    Type: Grant
    Filed: September 3, 2003
    Date of Patent: March 13, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hidefumi Yoshida, Yasutoshi Tasaka, Takashi Sasabayashi, Yohei Nakanishi, Kimiaki Nakamura, Yoshio Koike, Tetsuya Fujikawa
  • Patent number: 7167224
    Abstract: A vertically alignment mode liquid crystal display device having an improved viewing angle characteristic is disclosed. The disclosed liquid crystal display device uses a liquid crystal having a negative anisotropic dielectric constant, and orientations of the liquid crystal are vertical to substrates when no voltage being applied, almost horizontal when a predetermined voltage is applied, and oblique when an intermediate voltage is applied. At least one of the substrates includes a structure as domain regulating means, and inclined surfaces of the structure operate as a trigger to regulate azimuths of the oblique orientations of the liquid crystal when the intermediate voltage is applied.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: January 23, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Arihiro Takeda, Katsufumi Ohmuro, Yoshio Koike, Shingo Kataoka, Takahiro Sasaki, Takashi Sasabayashi, Hideaki Tsuda, Hideo Chida, Makoto Ohashi, Kenji Okamoto, Hisashi Yamaguchi, Minoru Otani, Makoto Morishige, Noriaki Furukawa, Tsuyoshi Kamada, Yoshinori Tanaka, Atuyuki Hoshino, Shougo Hayashi, Hideaki Takizawa, Takeshi Kinjou, Makoto Tachibanaki, Keiji Imoto, Tadashi Hasegawa, Hidefumi Yoshida, Hiroyasu Inoue, Yoji Taniguchi, Tetsuya Fujikawa, Satoshi Murata, Manabu Sawasaki, Tomonori Tanose, Siro Hirota, Masahiro Ikeda, Kunihiro Tashiro, Kouji Tsukao, Yasutoshi Tasaka, Takatoshi Mayama, Seiji Tanuma, Yohei Nakanishi
  • Publication number: 20070008476
    Abstract: AC voltage of rectangular wave is applied between a pixel electrode 25A and a common electrode 23A, and the amplitude Vac of the AC voltage component and the DC voltage component Vdc thereof are changed to measure the range of optimal DC component variation ?Vdc and determine a structure or material of a liquid crystal display device so as to lower ?Vdc less than a given value, wherein ?Vdc=|Vdcb?Vdcw|, Vdcb is the value of Vdc at which the range of transmittance variation is the minimum with Vac being fixed at a value for displaying black (2V), and Vdcw is the value of Vdc at which the range of transmittance variation is the minimum with Vac being fixed at a value for displaying white (7 V). Thickness of an insulating layer 26A on the pixel electrode 25A and on the common electrode 23A are the same. Electrode crossover portions are made to be in axial symmetry. The top surface of each stripe electrode of a pixel electrode has convex shape in cross section.
    Type: Application
    Filed: September 15, 2006
    Publication date: January 11, 2007
    Inventors: Yohei Nakanishi, Hidefumi Yoshida, Takashi Sasabayashi, Yasutoshi Tasaka, Tetsuya Fujikawa, Hidetoshi Sukenori
  • Patent number: 7157735
    Abstract: A thin-film transistor substrate, including a substrate with an insulating surface, gate electrodes, lower electrodes of capacitors made of the same material layer as the gate electrodes, a first insulating layer, a channel layer of high resistivity semiconductor having a concave part, and a pair of low resistivity source/drain electrodes. There is also a second insulating layer formed on the first insulating layer. A first connection hole penetrates the second insulating layer and exposes one of each of the pair of the source/drain electrodes. A second connection hole penetrates the second insulating layer and exposes a connection region of each of the upper layers of the upper electrode above the lower layer. A pixel electrode is formed on the second insulating layer and is connected to one of the source/drain electrodes and the upper layer of the upper electrode of the capacitor via the first and second connection holes.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: January 2, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tetsuya Fujikawa, Seiji Doi
  • Publication number: 20060285059
    Abstract: On a TFT substrate, gate bus lines, data bus lines, picture element electrodes, and the like are formed, and further a first alignment film is formed of polyimide or the like. On an opposing substrate, black matrices, common electrodes, and the like formed; and further column-like spacers are formed at positions facing regions where the gate bus lines and the data bus lines cross. A second alignment film covering the surfaces of the common electrode and the spacers is formed. However, the first and second alignment films are maintained semi-setting. Thereafter, the TFT substrate and the opposing substrate are overlapped, and heated at high temperature under pressure; and the second alignment film on the apexes of the spacers and the first alignment film on the TFT substrate side are joined.
    Type: Application
    Filed: May 19, 2006
    Publication date: December 21, 2006
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Takashi TAKAGI, Manabu SAWASAKI, Tetsuya FUJIKAWA
  • Patent number: 7145619
    Abstract: It is an object of the invention to provide a substrate for a liquid crystal display, a liquid crystal display having the same, and a method of manufacturing the same which make it possible to provide a display having high luminance and preferable display characteristics to be used in display sections of information apparatuses and the like. Each pixel is defined by gate bus lines extending in the horizontal direction and drain bus lines extending in the vertical direction. TFTs are formed in the vicinity of intersections between the bus lines, and resin overlap sections for shielding the TFTs from light are formed above the same. No black matrix is formed on a common electrode substrate which is provided in a face-to-face relationship with a TFT substrate, and the bus lines and the resin overlap sections formed on the TFT substrate function as a black matrix.
    Type: Grant
    Filed: June 10, 2002
    Date of Patent: December 5, 2006
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Manabu Sawasaki, Naoto Kondo, Tetsuya Fujikawa, Takashi Takagi, Tomonori Tanose, Tomoshige Oda, Akira Komorita, Katsunori Misaki, Shiro Hirota
  • Patent number: RE39452
    Abstract: A conductive film made of Al or alloy containing Al as a main component is formed on an underlying substrate. An upper conductive film is disposed on the conductive film. A first opening is formed through the upper conductive film. An insulating film is disposed on the upper conductive film A second opening is formed through the insulating film. An inner wall of the second opening is retreated from an inner wall of the first opening. An ITO film is formed covering a partial upper surface of the insulating film and inner surfaces of the first and second openings, and contacting a partial upper surface of the upper conductive film at a region inside of the second opening. Good electrical contact between an Al or Al alloy film and an ITO film can be established and productivity can be improved.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: January 2, 2007
    Assignee: Fujitsu Limited
    Inventors: Tetsuya Fujikawa, Hidetoshi Sukenori, Shougo Hayashi, Yoshinori Tanaka, Masahiro Kihara