Abstract: A component manufacturing system includes a main base, a first production base and a second production base. The main base designs a common wire harness and optional wire harnesses. The main base has a first order function of determining the number of common wire harnesses to be produced based on temporary order information and placing an order with the first production base, and a second order function of acquiring order confirmation information from the customer at a timing closer to a delivery date than the temporary order information and placing an order with the second production base for the completed wire harness based on the confirmation information.

Abstract: A semiconductor device is disclosed that includes a support substrate, a first semiconductor element that is mounted on one side of the support substrate, a second semiconductor element including a high frequency electrode that is mounted on the one side of the support substrate, a via hole that is provided at the support substrate in relation to the high frequency electrode, and an external connection electrode that is provided on the other side of the support substrate in relation to the via hole.

Abstract: An automatic analyzer is free from limitations on layout of various mechanisms, and thus causing no bottlenecks, for example, in a space-saving design of the automatic analyzer. This invention includes a coaxial planar duplex arrangement of two dilution disks each with annularly disposed dilution cells, and the dilution disks A and B operate independently of each other. Various mechanisms (parent-sample sampling mechanism, diluent delivery mechanism, diluent/sample mixing mechanism, and diluted-sample sampling mechanism) used in a dilution process can each access the two dilution disks. The dilution process for a parent sample, executed on the dilution disks A and B, can be continuously conducted by providing a fixed delay in operational timing between the two dilution disks.

Abstract: A semiconductor device is disclosed that includes a support substrate, a first semiconductor element that is mounted on one side of the support substrate, a second semiconductor element including a high frequency electrode that is mounted on the one side of the support substrate, a via hole that is provided at the support substrate in relation to the high frequency electrode, and an external connection electrode that is provided on the other side of the support substrate in relation to the via hole.

Abstract: A semiconductor device is disclosed that includes a support substrate, a first semiconductor element that is mounted on one side of the support substrate, a second semiconductor element including a high frequency electrode that is mounted on the one side of the support substrate, a via hole that is provided at the support substrate in relation to the high frequency electrode, and an external connection electrode that is provided on the other side of the support substrate in relation to the via hole.

Abstract: A semiconductor device with a structure having superior heat sink characteristics. A first heat sink member is located over a wiring board by using an adhesive material. A semiconductor element is stuck over the first heat sink member by using an adhesive material. The semiconductor element and electrodes located over the wiring board are connected by wires. A second heat sink member which covers the semiconductor element and the wires is joined to the first heat sink member by using a conductive adhesive material. The inside and outside of the second heat sink member are sealed by resin except a flat top thereof. By doing so, the semiconductor device is fabricated. Heat which is generated in the semiconductor element and which is transmitted to the first heat sink member is released from an edge portion of the first heat sink member.

Abstract: An automatic analyzer is free from limitations on layout of various mechanisms, and thus causing no bottlenecks, for example, in a space-saving design of the automatic analyzer. This invention includes a coaxial planar duplex arrangement of two dilution disks each with annularly disposed dilution cells, and the dilution disks A and B operate independently of each other. Various mechanisms (parent-sample sampling mechanism, diluent delivery mechanism, diluent/sample mixing mechanism, and diluted-sample sampling mechanism) used in a dilution process can each access the two dilution disks. The dilution process for a parent sample, executed on the dilution disks A and B, can be continuously conducted by providing a fixed delay in operational timing between the two dilution disks.

Abstract: A semiconductor device is disclosed that includes a support substrate, a first semiconductor element that is mounted on one side of the support substrate, a second semiconductor element including a high frequency electrode that is mounted on the one side of the support substrate, a via hole that is provided at the support substrate in relation to the high frequency electrode, and an external connection electrode that is provided on the other side of the support substrate in relation to the via hole.

Abstract: A semiconductor device with a structure having superior heat sink characteristics. A first heat sink member is located over a wiring board by using an adhesive material. A semiconductor element is stuck over the first heat sink member by using an adhesive material. The semiconductor element and electrodes located over the wiring board are connected by wires. A second heat sink member which covers the semiconductor element and the wires is joined to the first heat sink member by using a conductive adhesive material. The inside and outside of the second heat sink member are sealed by resin except a flat top thereof. By doing so, the semiconductor device is fabricated. Heat which is generated in the semiconductor element and which is transmitted to the first heat sink member is released from an edge portion of the first heat sink member.

Abstract: A method of design of a circuit board enabling high density conductor lines to be drawn efficiently. A rats nest is formed by connecting pads to which terminals of an electronic device are connected and external connection terminals by lines. A region with the highest density of lines of the rats nest is then selected and design rules relating to routes and dimensions of conductor lines are set in the region with the highest density of lines of the rats nest. Conductor lines are then laid at the region with the highest density of lines of the rats nest, and whether or not the conductor lines can be laid at the region with the highest density of lines of the rats nest is confirmed. Setting of the design rules and laying of conductor lines are if the conductor lines cannot be laid, and the conductor lines of the remaining regions are laid by the set design rules if the conductor lines can be laid.

Abstract: A semiconductor device comprises a frame provided on a substrate to form a semiconductor-chip accommodating part on the substrate. A semiconductor chip is provided in the semiconductor-chip accommodating part. An organic insulating layer is provided to cover the semiconductor chip and the frame. A wiring layer is provided on the organic insulating layer. In the semiconductor device, the frame comprises gaps which are arranged in a longitudinal direction of the frame.

Abstract: A semiconductor device, includes a supporting board; and a semiconductor element mounted on a first main surface of the supporting board. The supporting board includes a first electrode formed on the first main surface, a second electrode formed on a second main surface, and an opening or notch forming part. A first electrode pad of the semiconductor element faces and is connected to the first electrode of the supporting board. A second electrode pad of the semiconductor element and the second electrode of the supporting board are electrically connected via the opening or notch forming part.

Abstract: A semiconductor device is disclosed that includes a support substrate, a first semiconductor element that is mounted on one side of the support substrate, a second semiconductor element including a high frequency electrode that is mounted on the one side of the support substrate, a via hole that is provided at the support substrate in relation to the high frequency electrode, and an external connection electrode that is provided on the other side of the support substrate in relation to the via hole.

Abstract: A server performs electronic commerce with a client by using a network. An order receiving unit of the server separates a sales article into information and goods and presents them as an ordering target to the client. An article providing unit of the server selects the separated information, separated goods, or a combination thereof on the basis of an ordering request from the client and provides it to the client. The article providing unit executes a time difference service for providing the separated goods after the separated information was precedently provided. The article providing unit provides a separation service for solely providing the separated information and the separated goods, respectively.

Abstract: A method of design of a circuit board enabling high density conductor lines to be drawn efficiently. A rats nest is formed by connecting pads to which terminals of an electronic device are connected and external connection terminals by lines. A region with the highest density of lines of the rats nest is then selected and design rules relating to routes and dimensions of conductor lines are set in the region with the highest density of lines of the rats nest. Conductor lines are then laid at the region with the highest density of lines of the rats nest, and whether or not the conductor lines can be laid at the region with the highest density of lines of the rats nest is confirmed. Setting of the design rules and laying of conductor lines are if the conductor lines cannot be laid, and the conductor lines of the remaining regions are laid by the set design rules if the conductor lines can be laid.

Abstract: A semiconductor device comprises a frame provided on a substrate to form a semiconductor-chip accommodating part on the substrate. A semiconductor chip is provided in the semiconductor-chip accommodating part. An organic insulating layer is provided to cover the semiconductor chip and the frame. A wiring layer is provided on the organic insulating layer. In the semiconductor device, the frame comprises gaps which are arranged in a longitudinal direction of the frame.

Abstract: In a semiconductor device circuit formation surfaces of each of a plurality of semiconductor chips can be easily located at even level when the semiconductor chips are arranged side by side so that a process of forming rearrangement wiring is simplified. The semiconductor chips are mounted on a substrate via an adhesive layer in a two-dimensional arrangement. A resin layer is formed on the substrate and located around the semiconductor elements. The resin layer has the same thickness as a thickness of the semiconductor elements. An organic insulating layer is formed over a surface of the resin layer and circuit formation surfaces of the semiconductor elements. A rearrangement wiring layer is formed on the organic insulating layer and electrodes of the semiconductor chips. External connection terminals are electrically connected to the circuit formation surfaces of the semiconductor elements through wiring in the rearrangement wiring layer.

Abstract: A structure in which a phosphorus-nickel layer, a rich phosphorus nickel layer that contains phosphorus or boron higher than this phosphorus-nickel layer, a nickel-tin ally layer, a tin-rich tin alloy layer, and a tin alloy solder layer are formed in sequence on an electrode. Accordingly, adhesiveness between a metal pattern used as the electrode, the wiring, or the pad and the solder can be improved.

Abstract: A contactor has a contactor substrate and a plurality of contact electrodes formed on the contactor substrate. Each contact electrode is formed by a metal wire bent between one end joined to the contactor substrate and the other end. An inclined plane is formed by a cutting surface. A fracture surface formed by a tension fracture is formed at the apex portion of the contact electrode.

Abstract: A semiconductor module includes a plurality of semiconductor devices each including a circuit substrate carrying thereon a single memory semiconductor chip and a socket for holding the semiconductor devices detachably.