Patents by Inventor Tetsuya Fukuoka

Tetsuya Fukuoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070149927
    Abstract: A catheter assembly (1), including an outer catheter (2) and an inner catheter (6) capable of being inserted into the outer catheter (2). The catheter assembly is characterized in that an outer catheter hub (5) and an inner catheter hub (9) are fixedly fitted to each other so that the two catheters are not rotated nor moved relative to each other, and when fitted to each other, at least a part of the tip of the inner catheter (6) is protruded by 10 mm or shorter from the tip of the outer catheter (2). When the inner catheter is inserted into the outer catheter, operabilities such as kink resistance, press-in performance, and torque transmission performance are excellent and the inner diameter thereof is increased when the catheter is used after indwelling. As a result, the range of choices of a catheter for treatment can be increased.
    Type: Application
    Filed: December 10, 2004
    Publication date: June 28, 2007
    Applicant: TERUMO KABUSHIKI KAISHA
    Inventors: Takenari Itou, Tetsuya Fukuoka
  • Patent number: 7185171
    Abstract: There is provided a semiconductor integrated circuit which assures sufficiently lower power consumption of a translation look-aside buffer without deterioration of operation rate performance thereof. In the translation look-aside buffer to convert logical address into physical address, a clock enable generating circuit is provided to stop the operation clock to be supplied to the tag memory and entry memory of the translation look-aside buffer while the virtual memory valid bit Vs of the status register indicating access to the virtual memory is “0”, or while the cache-stall signal is outputted because of miss-hit in the cache, or when the access is issued with the same logical page address to the area other than the boundary area of the address range.
    Type: Grant
    Filed: July 16, 2003
    Date of Patent: February 27, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuya Fukuoka, Takeshi Miyazaki, Katsuichi Tomobe
  • Patent number: 7145818
    Abstract: A semiconductor integrated circuit device is provided with a diagnosis circuit, which does not increase the delay of a logic element in normal operation. In a latch provided at the output of a memory or at the input of a logic stage, a signal selector is provided in the feedback loop of the latch. The selector is switched in correspondence with the operation mode, such that it transfers the feedback signal in normal operation, while it transfers the test signal in a test mode, in order to prevent the delay from increasing in the signal selector on the main path in normal operation.
    Type: Grant
    Filed: March 23, 2004
    Date of Patent: December 5, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuya Fukuoka, Mikio Yamagishi
  • Publication number: 20060229589
    Abstract: A catheter comprises flat plate-like reinforcing wires having a predetermined width-to-thickness ratio, and an outer layer of a thermoplastic resin. The width and thickness of the reinforcing wires and the outside diameter of the catheter are in predetermined ratios to achieve a catheter whose proximal portion is relatively rigid and excellent in kink resistance notwithstanding a relatively large inside diameter and a relatively small material thickness.
    Type: Application
    Filed: April 10, 2006
    Publication date: October 12, 2006
    Applicant: Terumo Kabushiki Kaisha
    Inventors: Takenari Itou, Tetsuya Fukuoka
  • Publication number: 20060069381
    Abstract: An intravascular foreign matter suction assembly is insertable into a blood vessel having a relatively small diameter and exhibits a high suction force. The intravascular foreign matter suction assembly includes a combination of a guiding catheter for being inserted to an ostium of a coronary artery of the aorta and a suction catheter inserted in the lumen of the guiding catheter and extending farther than the distal end of the guiding catheter for removing foreign matter in a blood vessel which exists at a target location in the coronary artery. The suction catheter includes a tubular portion provided on the distal end side and a wire portion provided on the proximal end side of the tubular portion and wherein the wire portion has a distal end embedded in a wall which forms the tubular portion.
    Type: Application
    Filed: September 23, 2005
    Publication date: March 30, 2006
    Applicant: TERUMO KABUSHIKI KAISHA
    Inventors: Takenari Itou, Tetsuya Fukuoka
  • Publication number: 20050015007
    Abstract: A catheter assembly comprises an outer catheter comprising a distal end curved portion having a first curved shape, and an inner catheter which comprises a distal end curved portion having a second curved shape different from the first curved shape and which can be inserted into the outer catheter so that the distal end curved portion thereof is located in the distal end curved portion of the outer catheter and be withdrawn therefrom. The distal end curved portion of the outer catheter is more flexible than the distal end curved portion of the inner catheter. A distal end portion of the catheter assembly, when the inner catheter is inserted in the outer catheter so that the distal end curved portion of the inner catheter is located in the distal end curved portion of the outer catheter, assumes a curved shape different from the first curved shape.
    Type: Application
    Filed: June 2, 2004
    Publication date: January 20, 2005
    Applicant: Terumo Kabushiki Kaisha
    Inventors: Takenari Itou, Tetsuya Fukuoka
  • Publication number: 20040213050
    Abstract: A semiconductor integrated circuit device is provided with a diagnosis circuit, which does not increase the delay of a logic element in normal operation. In a latch provided at the output of a memory or at the input of a logic stage, a signal selector is provided in the feedback loop of the latch. The selector is switched in correspondence with the operation mode, such that it transfers the feedback signal in normal operation, while it transfers the test signal in a test mode, in order to prevent the delay from increasing in the signal selector on the main path in normal operation.
    Type: Application
    Filed: March 23, 2004
    Publication date: October 28, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Tetsuya Fukuoka, Mikio Yamagishi
  • Publication number: 20040019762
    Abstract: There is provided a semiconductor integrated circuit which assures sufficiently lower power consumption of a translation look-aside buffer without deterioration of operation rate performance thereof.
    Type: Application
    Filed: July 16, 2003
    Publication date: January 29, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Tetsuya Fukuoka, Takeshi Miyazaki, Katsuichi Tomobe