Patents by Inventor Tetsuya Fukushima

Tetsuya Fukushima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240103599
    Abstract: Methods, systems, and devices for programming power management circuits in a system are described. An apparatus may include a set of one or more power management circuits configured to provide one or more operating voltages for the apparatus. The apparatus may also include an interface coupled with a controller via a bus. The apparatus may include a first switching circuit configured to isolate the bus from the controller and to couple the bus with a second switching circuit. The second switching circuit may be configured to isolate the set of one or more power management circuits from the controller and to couple the set of one or more power management circuits with the first switching circuit.
    Type: Application
    Filed: September 28, 2022
    Publication date: March 28, 2024
    Inventors: William A. Lendvay, Paul Zipp, Yoshihisa Fukushima, Mamoru Nagase, Tetsuya Shibata
  • Publication number: 20240092655
    Abstract: A novel method for forming a positive electrode active material is provided. In the method for forming a positive electrode active material, a cobalt source and an additive element source are mixed to form an acidic solution; the acidic solution and an alkaline solution are made to react to form a cobalt compound; the cobalt compound and a lithium source are mixed to form a mixture; and the mixture is heated. The additive element source is a compound containing one or more selected from gallium, aluminum, boron, nickel, and indium.
    Type: Application
    Filed: January 21, 2022
    Publication date: March 21, 2024
    Inventors: Shunpei YAMAZAKI, Yusuke YOSHITANI, Yohei MOMMA, Kunihiro FUKUSHIMA, Tetsuya KAKEHATA
  • Patent number: 9861956
    Abstract: Provided by the present invention is a photocatalytic coating composition which can express excellent visibility during application work and further can, owing to its excellent physical properties, form a homogeneous photocatalyst coated film having uniform thickness on a surface of a substrate. The photocatalytic coating composition which is basic and comprises photocatalyst particles, a basic dye, a layered silicate, and a dispersion medium. The basic dye enhances visibility of the part where the photocatalytic coating composition is applied so that the applied part can be easily distinguished from the unapplied part by the difference in appearance. After application work, color of the basic dye disappears by photolysis with a solar light or by decomposition with a photocatalyst. The layered silicate suppresses color change of the basic dye over time and stably keep color tone of the same.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: January 9, 2018
    Assignee: Toto Ltd.
    Inventors: Tetsuya Fukushima, Hiroaki Shimomura, Susumu Adachi, Takeshi Ikeda
  • Publication number: 20160288092
    Abstract: Provided by the present invention is a photocatalytic coating composition which can express excellent visibility during application work and further can, owing to its excellent physical properties, form a homogeneous photocatalyst coated film having uniform thickness on a surface of a substrate. The photocatalytic coating composition which is basic and comprises photocatalyst particles, a basic dye, a layered silicate, and a dispersion medium. The basic dye enhances visibility of the part where the photocatalytic coating composition is applied so that the applied part can be easily distinguished from the unapplied part by the difference in appearance. After application work, color of the basic dye disappears by photolysis with a solar light or by decomposition with a photocatalyst. The layered silicate suppresses color change of the basic dye over time and stably keep color tone of the same.
    Type: Application
    Filed: March 29, 2016
    Publication date: October 6, 2016
    Inventors: Tetsuya FUKUSHIMA, Hiroaki SHIMOMURA, Susumu ADACHI, Takeshi IKEDA
  • Publication number: 20160288091
    Abstract: Provided by the present invention is a photocatalytic coating composition having small viscosity change rate and excellent storage stability. The photocatalytic coating composition comprises photocatalyst particles, a dispersion medium, a thickener, and at least one selected from the group consisting of primary to tertiary alkanol amines, wherein the thickener is at least one selected from the group consisting of a polysaccharide thickener containing glucuronic acid and/or rhamnose in its main chain and a layered silicate, the ratio of the mass of the at least one selected from the group consisting of primary to tertiary alkanol amines relative to the mass of total solid content in the photocatalytic coating composition is in the range of 2.5% or more by mass to 25% or less by mass, and liquid property of the photocatalytic coating composition is basic.
    Type: Application
    Filed: March 29, 2016
    Publication date: October 6, 2016
    Inventors: Tetsuya FUKUSHIMA, Hiroaki SHIMOMURA, Susumu ADACHI, Takeshi IKEDA
  • Patent number: 8829685
    Abstract: Provided are: a circuit device demonstrating an improved connection reliability while being mounted; and a method for manufacturing the same. The circuit device of the present invention includes: an island; leads arranged around the island, each lead having a lower surface and a side surface exposed to the outside; and a semiconductor element mounted on the island and electrically connected to the leads through thin metal wires. Furthermore, the exposed end portion of the lead is formed to spread toward the outside. By forming the lead in this manner, the area where the lead comes into contact with a brazing filler material is increased, thus improving the connection strength therebetween.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: September 9, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Tetsuya Fukushima, Takashi Kitazawa
  • Patent number: 8609467
    Abstract: Provided are: a lead frame enabling efficient manufacturing of multiple circuit devices; and a method for manufacturing a circuit device using the same. In the lead frame of the present invention, units are arranged and frame-shaped first and second supporters are provided around the units to mechanically support the units. Moreover, a half groove is provided in the first supporter at a portion on an extended line of a dividing line defined at a boundary between each adjacent two of the units. Furthermore, a penetration groove penetrating a part of the second supporter at a portion on an extended line of another dividing line is provided.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: December 17, 2013
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventors: Tetsuya Fukushima, Takashi Kitazawa
  • Publication number: 20130076888
    Abstract: A microscope includes a zoom optical system zooming over a sample, a zoom driving unit moving the optical system along an optical axis, an imaging unit imaging an observation image of the sample through the optical system, thereby generating image data on the sample, and a display unit displaying an image corresponding to the generated image data. A touch panel on a display screen of the display unit accepts an input corresponding to a contact position of an object. A driving control unit outputs a driving signal for changing a zoom magnification of the optical system by setting a middle point between contact positions on the touch panel corresponding to two position signals responsive to an input of the different contact positions as a zoom center position fixed without depending on the zoom magnification of the optical system when the two position signals are output from the touch panel.
    Type: Application
    Filed: September 14, 2012
    Publication date: March 28, 2013
    Applicant: OLYMPUS CORPORATION
    Inventors: So Hibino, Tetsuya Fukushima
  • Patent number: 8279942
    Abstract: An image data processing apparatus includes: plural arithmetic processing sections; a main memory; and a cache memory, wherein slices of the image data are sequentially and cyclically assigned to the plural arithmetic processing sections and plural slices to be processed are set as objects of processing, respectively, and the plural arithmetic processing sections process the image data in parallel to establish a consistent relationship of the processing of each slice with processing of the immediately preceding slice, in which the current slice and the immediately preceding slice can be simultaneously processed in parallel so that a reference macroblock of the macroblock in processing in the current slice may partly overlap with a reference macroblock of the macroblock in processing in the immediately preceding slice.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: October 2, 2012
    Assignee: Sony Corporation
    Inventors: Yoshiyuki Ito, Tetsuya Fukushima, Yukio Yanagita
  • Publication number: 20100244209
    Abstract: Provided are: a circuit device demonstrating an improved connection reliability while being mounted; and a method for manufacturing the same. The circuit device of the present invention includes: an island; leads arranged around the island, each lead having a lower surface and a side surface exposed to the outside; and a semiconductor element mounted on the island and electrically connected to the leads through thin metal wires. Furthermore, the exposed end portion of the lead is formed to spread toward the outside. By forming the lead in this manner, the area where the lead comes into contact with a brazing filler material is increased, thus improving the connection strength therebetween.
    Type: Application
    Filed: March 31, 2009
    Publication date: September 30, 2010
    Applicants: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventors: Tetsuya Fukushima, Takashi Kitazawa
  • Publication number: 20100244210
    Abstract: Provided are: a lead frame enabling efficient manufacturing of multiple circuit devices; and a method for manufacturing a circuit device using the same. In the lead frame of the present invention, units are arranged and frame-shaped first and second supporters are provided around the units to mechanically support the units. Moreover, a half groove is provided in the first supporter at a portion on an extended line of a dividing line defined at a boundary between each adjacent two of the units. Furthermore, a penetration groove penetrating a part of the second supporter at a portion on an extended line of another dividing line is provided.
    Type: Application
    Filed: March 31, 2009
    Publication date: September 30, 2010
    Applicants: Sanyo Electric Co., Ltd, Sanyo Semiconductor Co., Ltd.
    Inventors: Tetsuya Fukushima, Takashi Kitazawa
  • Patent number: 7608562
    Abstract: A method of producing a photocatalyst according to the invention comprises forming an amorphous titanium oxide and heat-treating it in an atmosphere containing oxygen, whereby a photocatalyst having a good photocatalysis can be obtained. In particular, the amorphous titanium oxide is obtained by using the reactive sputtering method and via deposition at a low temperature and at a high film formation rate. This apparatus can be provided with cooling means to allow enhancement of the throughput of the film formation process.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: October 27, 2009
    Assignee: Shibaura Mechatronics Corporation
    Inventors: Junji Hiraoka, Minoru Takashio, Tetsuya Fukushima, Daisuke Noguchi, Yoshio Kawamata
  • Publication number: 20090228217
    Abstract: A recipe server executes an inspection region setup process for designating the inspection region of the object of inspection as the initial setting of a recipe; the recipe server executes optical condition setup process for setting an optical condition for the image pickup; a substrate inspection apparatus executes an image obtainment process for obtaining image data by picking up the image of the inspection object using a tentative recipe including the inspection region and optical condition which are designated by the recipe server; the recipe server executes a recipe tuning process for generating an adjusted recipe by tuning the tentative recipe using image data obtained by the substrate inspection apparatus; and the substrate inspection apparatus execute an inspection process for inspecting the inspection object on the basis of the adjusted recipe tuned by the recipe server.
    Type: Application
    Filed: March 5, 2009
    Publication date: September 10, 2009
    Inventor: Tetsuya FUKUSHIMA
  • Publication number: 20090134022
    Abstract: A method of producing a photocatalyst according to the invention comprises forming an amorphous titanium oxide and heat-treating it in an atmosphere containing oxygen, whereby a photocatalyst having a good photocatalysis can be obtained. In particular, the amorphous titanium oxide is obtained by using the reactive sputtering method and via deposition at a low temperature and at a high film formation rate. This apparatus can be provided with cooling means to allow enhancement of the throughput of the film formation process.
    Type: Application
    Filed: November 20, 2008
    Publication date: May 28, 2009
    Applicant: SHIBAURA MECHATRONICS CORPORATION
    Inventors: Junji HIRAOKA, Minoru Takashio, Tetsuya Fukushima, Daisuke Noguchi, Yoshio Kawamata
  • Patent number: 7462578
    Abstract: A method of producing a photocatalyst according to the invention comprises forming an amorphous titanium oxide and heat-treating it in an atmosphere containing oxygen, whereby a photocatalyst having a good photocatalysis can be obtained. In particular, the amorphous titanium oxide is obtained by using the reactive sputtering method and via deposition at a low temperature and at a high film formation rate. This apparatus can be provided with cooling means to allow enhancement of the throughput of the film formation process.
    Type: Grant
    Filed: November 29, 2002
    Date of Patent: December 9, 2008
    Assignee: Shibaura Mechatronics Corporation
    Inventors: Junji Hiraoka, Minoru Takashio, Tetsuya Fukushima, Daisuke Noguchi, Yoshio Kawamata
  • Publication number: 20070253491
    Abstract: An image data processing apparatus includes: plural arithmetic processing sections; a main memory; and a cache memory, wherein slices of the image data are sequentially and cyclically assigned to the plural arithmetic processing sections and plural slices to be processed are set as objects of processing, respectively, and the plural arithmetic processing sections process the image data in parallel to establish a consistent relationship of the processing of each slice with processing of the immediately preceding slice, in which the current slice and the immediately preceding slice can be simultaneously processed in parallel so that a reference macroblock of the macroblock in processing in the current slice may partly overlap with a reference macroblock of the macroblock in processing in the immediately preceding slice.
    Type: Application
    Filed: April 25, 2007
    Publication date: November 1, 2007
    Inventors: Yoshiyuki Ito, Tetsuya Fukushima, Yukio Yanagita
  • Patent number: 7119424
    Abstract: A semiconductor device (21) can include, e.g., a recessed portion (25) on the reverse surface (224) of an insulating resin (22) which is the mounting surface of the semiconductor device (21). Additionally, on the outer peripheral surface of the recessed portion (25), the exposed region of leads (26) and the reverse surface (224) of the insulating resin (22) form generally the same plane. This allows, e.g., a QFN semiconductor device (21) according to preferred embodiments herein to place dust particles in the recessed portion (25) even in the presence of dust particles such as crushed burr particles of the leads (26) or plastic burrs, thereby avoiding mounting deficiencies when mounting the semiconductor device.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: October 10, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Isao Ochiai, Toshiyuki Take, Tetsuya Fukushima
  • Patent number: 6893903
    Abstract: A semiconductor device (21) can include, e.g., a recessed portion (25) on the reverse surface (224) of an insulating resin (22) which is the mounting surface of the semiconductor device (21). Additionally, on the outer peripheral surface of the recessed portion (25), the exposed region of leads (26) and the reverse surface (224) of the insulating resin (22) form generally the same plane. This allows, e.g., a QFN semiconductor device (21) according to preferred embodiments herein to place dust particles in the recessed portion (25) even in the presence of dust particles such as crushed burr particles of the leads (26) or plastic burrs, thereby avoiding mounting deficiencies when mounting the semiconductor device.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: May 17, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Isao Ochiai, Toshiyuki Take, Tetsuya Fukushima
  • Publication number: 20050020444
    Abstract: A method of producing a photocatalyst according to the invention comprises forming an amorphous titanium oxide and heat-treating it in an atmosphere containing oxygen, whereby a photocatalyst having a good photocatalysis can be obtained. In particular, the amorphous titanium oxide is obtained by using the reactive sputtering method and via deposition at a low temperature and at a high film formation rate. This apparatus can be provided with cooling means to allow enhancement of the throughput of the film formation process.
    Type: Application
    Filed: November 29, 2002
    Publication date: January 27, 2005
    Inventors: Junji Hiraoka, Minoru Takashio, Tetsuya Fukushima, Daisuke Noguchi, Yoshio Kawamata
  • Publication number: 20040222513
    Abstract: A semiconductor device (21) can include, e.g., a recessed portion (25) on the reverse surface (224) of an insulating resin (22) which is the mounting surface of the semiconductor device (21). Additionally, on the outer peripheral surface of the recessed portion (25), the exposed region of leads (26) and the reverse surface (224) of the insulating resin (22) form generally the same plane. This allows, e.g., a QFN semiconductor device (21) according to preferred embodiments herein to place dust particles in the recessed portion (25) even in the presence of dust particles such as crushed burr particles of the leads (26) or plastic burrs, thereby avoiding mounting deficiencies when mounting the semiconductor device.
    Type: Application
    Filed: June 22, 2004
    Publication date: November 11, 2004
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Isao Ochiai, Toshiyuki Take, Tetsuya Fukushima