Patents by Inventor Tetsuya Hirano

Tetsuya Hirano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7329811
    Abstract: A musical tone generating apparatus, which is capable of effectively utilizing the access timing for an unused slave sound source, is provided. The musical tone generating apparatus is composed of a master sound source 1000, which comprises a mode switching means 101, an accumulator 102, an upper-address processing means 103, an address memory for a second sound source 104, an address-switching output means 105, a waveform data register 106, a sample buffer 107, an interpolation coefficient memory 108, an interpolation coefficient extracting means 109, a sample interpolation means 110 and a selection means 111.
    Type: Grant
    Filed: November 29, 2004
    Date of Patent: February 12, 2008
    Assignee: Kabushiki Kaisha Kawai Gakki Seisakusho
    Inventor: Tetsuya Hirano
  • Publication number: 20080017019
    Abstract: A sound control apparatus for a keyboard-based musical instrument for avoiding a touch of a shutter to a back check, thereby appropriately setting a sound generation timing and maintaining a satisfactory touch feeling. The sound control apparatus comprises a shutter integrated with a hammer adapted to swing associated with a swinging motion of a key, extending along a plane including a path along which said hammer swings, and formed with a cutout in an edge on an opposite side to a direction in which said hammer swings. An optical sensor has a light emitter disposed on one side of the swinging path of said shutter for emitting light, and a light receiver disposed on the other side of the swinging path for receiving the light from said light emitter, and generates a detection signal in accordance with a light receiving state of said light receiver.
    Type: Application
    Filed: July 19, 2007
    Publication date: January 24, 2008
    Applicant: Kabushiki Kaisha Kawai Gakki Seisakusho
    Inventors: Kenichi Hirota, Tetsuya Hirano
  • Publication number: 20070119289
    Abstract: A musical tone generating apparatus, which is capable of effectively utilizing the access timing for an unused slave sound source, is provided. The musical tone generating apparatus is composed of a master sound source 1000, which comprises a mode switching means 101, an accumulator 102, an upper-address processing means 103, an address memory for a second sound source 104, an address-switching output means 105, a waveform data register 106, a sample buffer 107, an interpolation coefficient memory 108, an interpolation coefficient extracting means 109, a sample interpolation means 110 and a selection means 111.
    Type: Application
    Filed: November 29, 2004
    Publication date: May 31, 2007
    Applicant: Kabushiki Kaisha Kawai Gakki Seisakusho
    Inventor: Tetsuya Hirano
  • Publication number: 20070113024
    Abstract: To provide a data processor, which allows a CPU to access an external memory in an interval between data accesses from a DPS having a variable data length. In a case where a 24-bit mode is set, when a determination section 11 determines that a DSP 2 is accessing an external memory 102, a control section 12 commands to place the access from a CPU to the external memory 102 in a wait state. In a case where a 16-bit mode is set, the control section 12 commands an address-data switching section 13, allowing the CPU 111 to access the external memory by utilizing a third bus cycle, which is free.
    Type: Application
    Filed: November 29, 2004
    Publication date: May 17, 2007
    Applicant: KABUSHIKI KAISHA KAWAI GAKKI
    Inventor: Tetsuya Hirano
  • Patent number: 7146508
    Abstract: An image processing apparatus capable of preventing a copy protect function of a video or other contents signal from being disabled. An encoder encodes a contents signal from a DVD reproduction unit. A copy protect circuit performs copy protect processing on the encoded signal and outputs it. The copy protect circuit is controlled by control data input from CPU via an I2C_IF circuit. At this time, verification data from the CPU is stored in, and then read from registers in the I2C_IF circuit. Then, the CPU verifies the destination of transmission of the control data.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: December 5, 2006
    Assignee: Sony Corporation
    Inventors: Tetsuya Hirano, Hiroshi Tajima
  • Publication number: 20060185497
    Abstract: A speed detecting apparatus for a keyboard musical instrument is provided for accurately detecting the speed of bivotal movements of a hammer and a key even if a shutter implies errors in its attachment, without affected by such errors. The speed detecting apparatus for a keyboard musical instrument comprises a pivotable key, a hammer pivotably supported by a fulcrum and configured to pivotally move in association with a pivotal movement of the key, a shutter integrally attached to the hammer, a plurality of detectors, each having a light emitter and a light receiver for receiving light emitted from the light emitter, arranged on one and the other sides of the pivotal movement path of the shutter, and a CPU for detecting a pivot speed of the hammer in response to timings at which the shutter opens and closes the light paths of the light of the plurality of detectors when the hammer pivotally moves.
    Type: Application
    Filed: January 25, 2006
    Publication date: August 24, 2006
    Inventors: Kenichi Hirota, Tetsuya Hirano
  • Publication number: 20060117226
    Abstract: A data communication system is able to reliably identify a cause of a transfer error even when transfer errors occur in a plurality of bus masters. The data communication system includes a bus to which a plurality of bus masters and a plurality of bus slaves are connected and which transfers a data between a bus master and a bus slave; a data storage unit having a plurality of data storage regions corresponding to the plurality of bus masters; a detection unit for detecting the transfer error; and a control unit for identifying a bus master and a bus slave involved in the transfer error and transfer-related data including at least an address on the bus slave from the data on the bus in accordance with the transfer error detected by the detection unit and storing the data identifying the bus slave and the transfer-related data in a data storage region corresponding to the identified bus master.
    Type: Application
    Filed: November 30, 2005
    Publication date: June 1, 2006
    Applicant: Sony Corporation
    Inventor: Tetsuya Hirano
  • Publication number: 20050225802
    Abstract: An image processing apparatus capable of flexibly changing edge enhancement, blurring, and other image effect processing, wherein, in accordance with the execution of a program by a CPU, the CPU produces control signals to control an image processing circuit, read circuits in the image processing circuit read image data from a memory circuit by using a texture function, a write circuit writes the image data produced by subtraction by a subtraction circuit, multiplication with a coefficient by a multiplication circuit, and addition by an addition circuit to the memory circuit, and the image processing circuit performs processing relating to image effects such as ?-blending, edge enhancement, and blurring on the basis of the control signals from the CPU.
    Type: Application
    Filed: June 1, 2005
    Publication date: October 13, 2005
    Inventors: Hiroshi Tajima, Tetsuya Hirano
  • Patent number: 6950564
    Abstract: An image processing apparatus capable of flexibly changing edge enhancement, blurring, and other image effect processing, wherein, in accordance with the execution of a program by a CPU, the CPU produces control signals to control an image processing circuit, read circuits in the image processing circuit read image data from a memory circuit by using a texture function, a write circuit writes the image data produced by subtraction by a subtraction circuit, multiplication with a coefficient by a multiplication circuit, and addition by an addition circuit to the memory circuit, and the image processing circuit performs processing relating to image effects such as ?-blending, edge enhancement, and blurring on the basis of the control signals from the CPU.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: September 27, 2005
    Assignee: Sony Corporation
    Inventors: Hiroshi Tajima, Tetsuya Hirano
  • Patent number: 6909165
    Abstract: A mirror-polished obverse surface and a roughened reverse surface of the conventional GaN wafers have been discriminated by difference of roughness on the surfaces with human eyesight. The difference of the surfaces is rather ambiguous. Cracks/breaks and distortion of the wafers have been likely to occur because the roughness of the reverse surface is apt to bring fine particles. To discern an obverse from a reverse without making use of the difference of the surface roughness, the present invention provides an obverse/reverse discriminative rectangular nitride semiconductor wafer having a longer slanting edge and a shorter slanting edge at obversely-clockwise neighboring corners, or having an asymmetric slanting edge at a corner, or having asymmetrically bevelled parts or having discriminating characters marked by laser. The present invention can make the reverse surface mirror-polished and smooth, so that particles on the reverse surface and distortion, cracks or breaks of the wafer decrease.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: June 21, 2005
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Masahiro Nakayama, Tetsuya Hirano
  • Publication number: 20040188804
    Abstract: A mirror-polished obverse surface and a roughened reverse surface of the conventional GaN wafers have been discriminated by difference of roughness on the surfaces with human eyesight. The difference of the surfaces is rather ambiguous. Cracks/breaks and distortion of the wafers have been likely to occur because the roughness of the reverse surface is apt to bring fine particles.
    Type: Application
    Filed: September 10, 2003
    Publication date: September 30, 2004
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Masahiro Nakayama, Tetsuya Hirano
  • Publication number: 20030227074
    Abstract: A semiconductor chip mounted on a flat package has two functions. The semiconductor chip has a function selecting pad supplied with a selection voltage for selecting a function. The semiconductor chip also has voltage pads for outputting function selecting voltages. Thereby the selection of a function is enabled by bonding connection such that the voltage of the voltage pad or the voltage pad is inputted to the function selecting pad via a lead frame. Thus the function can be selected and determined by the bonding connection at the time of fabrication.
    Type: Application
    Filed: April 23, 2003
    Publication date: December 11, 2003
    Inventor: Tetsuya Hirano
  • Publication number: 20030044010
    Abstract: An image processing apparatus capable of preventing a copy protect function of a video or other contents signal from being disabled. An encoder encodes a contents signal from a DVD reproduction unit. A copy protect circuit performs copy protect processing on the encoded signal and outputs it. The copy protect circuit is controlled by control data input from CPU via an I2C_IF circuit. At this time, verification data from the CPU is stored in, then read from registers in the I2C_IF circuit. Then, the CPU verifies the destination of transmission of the control data.
    Type: Application
    Filed: August 27, 2002
    Publication date: March 6, 2003
    Inventors: Tetsuya Hirano, Hiroshi Tajima
  • Publication number: 20030031374
    Abstract: An image processing apparatus capable of flexibly changing edge enhancement, blurring, and other image effect processing, wherein, in accordance with execution of a program by a CPU, the CPU produces control signals to control an image processing circuit, read circuits in the image processing circuit read image data from a memory circuit by using a texture function, a write circuit writes the image data produced by subtraction by a subtraction circuit, multiplication with a coefficient by a multiplication circuit, and addition by an addition circuit to the memory circuit, and the image processing circuit performs processing relating to image effects such as &agr;-blending, edge enhancement, and blurring on the basis of the control signals from the CPU.
    Type: Application
    Filed: July 1, 2002
    Publication date: February 13, 2003
    Inventors: Hiroshi Tajima, Tetsuya Hirano
  • Patent number: 6498483
    Abstract: A SQUID bias current adjustment device supplies a sinusoidal current at 40 kHz, for example, to a coil to generate magnetic field at a SQUID. The amplitude of the field corresponds to a half period of a field-voltage characteristic. Voltage generated from the SQUID at this time is filtered by using a filter to pick out components of 40 kHz and 80 kHz. The picked out signal components are rectified and converted to direct current, and the bias current is adjusted such that the maximum value is obtained. In this way, a SQUID bias current adjustment device can be provided capable of automatically adjusting bias current properly in a short period of time.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: December 24, 2002
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tetsuya Hirano, Tatsuoki Nagaishi, Hideo Itozaki
  • Patent number: 6388440
    Abstract: A modulation current at a predetermined frequency f is applied from an AC source to a flux locked loop for maintaining magnetic flux supplied to a SQUID at a constant value. An output voltage is picked out from the SQUID in this state to which a predetermined bias current is being applied from a current and field bias application circuit, and the picked out voltage passed through a filter and a rectifier is monitored by a voltage monitor. The filter picks out a frequency component of 80 kHz which is twice as high as the frequency component f, 40 kHz, applied from the AC source, and maximizes it. In this way, a method and a device for easily adjusting magnetic field bias in a modulation drive circuit for a SQUID can be provided.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: May 14, 2002
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Tatsuoki Nagaishi, Tetsuya Hirano, Hideo Itozaki
  • Patent number: 6304971
    Abstract: A security system for preventing disc players from being used with unauthorized software is disclosed. The security code is stored through modulating an offset of the physical position of a plurality of data bits from a nominal track position. A two part optical read head provides an RF signal corresponding to the presence of a physical offset modulation. The RF signal is present when there is a physical offset of the data bits defining a first logical state and the absence of the RF signal defines a second logical state. A digital security code is encoded and decoded in this manner. A system for encoding a security code through modulating the physical offset of a plurality of data bits from a nominal track position is also disclosed.
    Type: Grant
    Filed: August 16, 1999
    Date of Patent: October 16, 2001
    Inventors: Ken Kutaragi, Tetsuya Hirano
  • Patent number: 6122739
    Abstract: A security system for preventing disc players from being used with unauthorized software is disclosed. The security code is stored through modulating an offset of the physical position of a plurality of data bits from a nominal track position. A two part optical read head provides an RF signal corresponding to the presence of a physical offset modulation. The RF signal is present when there is a physical offset of the data bits defining a first logical state and the absence of the RF signal defines a second logical state. A digital security code is encoded and decoded in this manner. A system for encoding a security code through modulating the physical offset of a plurality of data bits from a nominal track position is also disclosed.
    Type: Grant
    Filed: November 13, 1995
    Date of Patent: September 19, 2000
    Assignee: Sony Corporation
    Inventors: Ken Kutaragi, Tetsuya Hirano
  • Patent number: 6074300
    Abstract: In a video reproducing apparatus, operating devices and recording devices are connected with a simple structure to record game information while operating the game, and a plurality of small capacity of external secondary memory means can be used as a large capacity of external secondary memory means. The main body of the video game machine is connected to a plurality of the operating devices with a serial interface so that serial data is communicated bidirectionally in accordance with a predetermined communication procedure while at the same time connecting recording devices to the serial interface respectively corresponding to a plurality of operating devices to allow the main body of the game machine to write predetermined data into and read it from recording devices in accordance with a communication procedure.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: June 13, 2000
    Assignee: Sony Corporation
    Inventors: Tetsuya Hirano, Hisayuki Kunigita, Shinichi Okamoto, Shinji Noda, Teiji Yutaka
  • Patent number: 6030292
    Abstract: In a video reproducing apparatus, operating devices and recording devices are connected with a simple structure to record game information while operating the game, and a plurality of small capacity of external secondary memory can be used as a large capacity of external secondary memory. The main body of the video game machine is connected to a plurality of the operating devices with a serial interface so that serial data is communicated bidirectionally in accordance with a predetermined communication procedure while at the same time connecting recording devices to the serial interface respectively corresponding to a plurality of operating devices to allow the main body of the game machine to write predetermined data into and read it from recording devices in accordance with a communication procedure.
    Type: Grant
    Filed: January 17, 1997
    Date of Patent: February 29, 2000
    Assignee: Sony Corporation
    Inventors: Tetsuya Hirano, Hisayuki Kunigita, Shinichi Okamoto, Shinji Noda, Teiji Yutaka