Patents by Inventor Tetsuya Kaizu

Tetsuya Kaizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7992012
    Abstract: In order to make it possible to reduce the time required for the central power source control unit to perform power source control of the power source unit of the expanded apparatus, the central power source control unit includes: a power source control information holding unit which holds power source control information written by a central processing circuit for performing power source controlling of another power source device; and a transmission control unit which transmits the power source control information held in the power source control information holding unit to another power source control circuit that performs power source control of said another power source device.
    Type: Grant
    Filed: September 19, 2007
    Date of Patent: August 2, 2011
    Assignee: Fujitsu Limited
    Inventor: Tetsuya Kaizu
  • Patent number: 7750676
    Abstract: An embedded system having a programmable logic circuit, a plurality of storage devices each storing configuration data defining circuit information of the logic circuit, a setting information storage storing setting information including information of a storage device storing the configuration data and a controller selecting one of the plurality of storage devices based on the setting information and incorporating circuit information defined by configuration data stored in the selected storage device into the logic circuit.
    Type: Grant
    Filed: December 26, 2007
    Date of Patent: July 6, 2010
    Assignee: Fujitsu Limited
    Inventor: Tetsuya Kaizu
  • Patent number: 7643369
    Abstract: To make it possible to reliably halt writing processing while restraining erroneous writing to the memory unit, present apparatus has a memory unit to which data is written for each write request; a voltage converting unit which converts a first power source voltage into a first operable voltage with which a write request issuing unit is operable, and supplies the first operable voltage to the write request issuing unit; a voltage monitoring unit, which outputs an issuance restraining signal which restrains issuance of the write request, when the first power source voltage becomes lower than a reference voltage; and an issuance restrain controlling unit which receives the issuance restrain signal, and then after completion of writing for each of the write request to write memory unit, which restrains the issuance of the write request by the write request issuance unit.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: January 5, 2010
    Assignee: Fujitsu Limited
    Inventor: Tetsuya Kaizu
  • Publication number: 20090027991
    Abstract: To make it possible to reliably halt writing processing while restraining erroneous writing to the memory unit, present apparatus has a memory unit to which data is written for each write request; a voltage converting unit which converts a first power source voltage into a first operable voltage with which a write request issuing unit is operable, and supplies the first operable voltage to the write request issuing unit; a voltage monitoring unit, which outputs an issuance restraining signal which restrains issuance of the write request, when the first power source voltage becomes lower than a reference voltage; and an issuance restrain controlling unit which receives the issuance restrain signal, and then after completion of writing for each of the write request to write memory unit, which restrains the issuance of the write request by the write request issuance unit.
    Type: Application
    Filed: October 11, 2007
    Publication date: January 29, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Tetsuya Kaizu
  • Publication number: 20080258758
    Abstract: An embedded system having a programmable logic circuit, a plurality of storage devices each storing configuration data defining circuit information of the logic circuit, a setting information storage storing setting information including information of a storage device storing the configuration data and a controller selecting one of the plurality of storage devices based on the setting information and incorporating circuit information defined by configuration data stored in the selected storage device into the logic circuit.
    Type: Application
    Filed: December 26, 2007
    Publication date: October 23, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Tetsuya Kaizu
  • Publication number: 20080162959
    Abstract: In order to make it possible to reduce the time required for the central power source control unit to perform power source control of the power source unit of the expanded apparatus, the central power source control unit includes: a power source control information holding unit which holds power source control information written by a central processing circuit for performing power source controlling of another power source device; and a transmission control unit which transmits the power source control information held in the power source control information holding unit to another power source control circuit that performs power source control of said another power source device.
    Type: Application
    Filed: September 19, 2007
    Publication date: July 3, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Tetsuya KAIZU
  • Patent number: 6252826
    Abstract: Oscillating precision of the first and the second oscillating sections each having the same oscillation frequency is determined in the oscillating precision determining section according to the timing of a signal supplied from the external time source, and in the internal time stepping control section, stepping control is provided over the internal time using a reference clock oscillated by any of the first and the second oscillating sections according to a result of determination of the oscillation precision.
    Type: Grant
    Filed: August 27, 1998
    Date of Patent: June 26, 2001
    Assignee: Fujitsu Limited
    Inventors: Tetsuya Kaizu, Michio Kai