Patents by Inventor Tetsuya Kiguchi

Tetsuya Kiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260123862
    Abstract: An oxygen saturation measuring device determines a first light projection timing and a second light projection timing based on a peak timing and a bottom timing of a third pulse wave signal corresponding to a light intensity of received light of reference light in one pulsation, causes the first light emitting element to project the red light at the first light projection timing, causes the second light emitting element to project the infrared light at the second light projection timing, and measures oxygen saturation of an artery based on a first pulse wave signal output from a light receiving element according to the red light projected at the first light projection timing and a second pulse wave signal output from the light receiving element according to the infrared light projected at the second light projection timing.
    Type: Application
    Filed: October 11, 2023
    Publication date: May 7, 2026
    Applicant: OMRON CORPORATION
    Inventors: Mitsuaki KUBO, Masayuki KOIZUMI, Masahiro KAWACHI, Yuki MATSUI, Kazuo YAMAMOTO, Tetsuya KIGUCHI, Masayuki ARAKAWA, Suguru OHASHI
  • Publication number: 20250387051
    Abstract: The present disclosure relates to an oxygen saturation measuring device with a band wound on a wrist of a measurement subject; a first sensor portion attached to the band; and a notification portion.
    Type: Application
    Filed: July 12, 2023
    Publication date: December 25, 2025
    Applicant: OMRON CORPORATION
    Inventors: Kazuo YAMAMOTO, Yutaro OKUNO, Yuki MATSUI, Tetsuya KIGUCHI, Masayuki ARAKAWA, Suguru OHASHI, Mitsuaki KUBO
  • Patent number: 12159425
    Abstract: A three-dimensional measurement system projects patterned light onto a target object, images the target object from different viewpoints to obtain a first image and a second image, obtains first depth information using the first image with a spatially encoded pattern technique, defines a search range for a corresponding point based on parallax between the first image and the second image predicted from the first depth information, and obtains second depth information by performing stereo matching for the defined search range using the first image and the second image. The second depth information has a higher spatial resolution than the first depth information. The patterned light has a combined pattern combining a spatially encoded pattern including a plurality of unit elements arranged regularly and a random pattern including a plurality of random pieces arranged randomly. Each of the plurality of unit elements is an area corresponding to a depth value.
    Type: Grant
    Filed: May 22, 2019
    Date of Patent: December 3, 2024
    Assignee: OMRON CORPORATION
    Inventors: Jun Ota, Shinya Matsumoto, Tetsuya Kiguchi
  • Publication number: 20220397739
    Abstract: An optical assembly (13) for a three-dimensional measurement device is equipped with: an optical lens (320) that forms a pair of conjugate planes having an optically conjugate relationship; an optical device (341) that is disposed on one of the pair of conjugate planes; a temperature sensor (354) for detecting the temperature of the optical lens (320); a heater (350) for heating the optical lens (320); and a control part that controls the operation of the heater (350) on the basis of the result of the detection made by the temperature sensor (354) such that the optical lens (320) reaches a constant temperature.
    Type: Application
    Filed: August 28, 2020
    Publication date: December 15, 2022
    Applicant: OMRON Corporation
    Inventors: Takeshi INODA, Tomonori ARIYOSHI, Hitoshi NAKATSUKA, Motoharu OKUNO, Shinya MATSUMOTO, Jun OTA, Tetsuya KIGUCHI
  • Publication number: 20220222843
    Abstract: A three-dimensional measurement system projects patterned light onto a target object, images the target object from different viewpoints to obtain a first image and a second image, obtains first depth information using the first image with a spatially encoded pattern technique, defines a search range for a corresponding point based on parallax between the first image and the second image predicted from the first depth information, and obtains second depth information by performing stereo matching for the defined search range using the first image and the second image. The second depth information has a higher spatial resolution than the first depth information. The patterned light has a combined pattern combining a spatially encoded pattern including a plurality of unit elements arranged regularly and a random pattern including a plurality of random pieces arranged randomly. Each of the plurality of unit elements is an area corresponding to a depth value.
    Type: Application
    Filed: May 22, 2019
    Publication date: July 14, 2022
    Inventors: Jun OTA, Shinya MATSUMOTO, Tetsuya KIGUCHI
  • Patent number: 10622484
    Abstract: The present invention provides a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer, which are laminated on a substrate. The semiconductor layer is a polysilicon thin film. The polysilicon thin film in regions corresponding to the source electrode and the drain electrode has a smaller crystal grain size than that of the polysilicon thin film in a channel region between the source electrode and the drain electrode.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: April 14, 2020
    Assignee: V TECHNOLOGY CO., LTD.
    Inventors: Michinobu Mizumura, Makoto Hatanaka, Tetsuya Kiguchi
  • Patent number: 10535778
    Abstract: The present invention provides a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer, which are laminated on a substrate. The semiconductor layer is a polysilicon thin film. The polysilicon thin film in regions corresponding to the source electrode and the drain electrode has a smaller crystal grain size than that of the polysilicon thin film in a channel region between the source electrode and the drain electrode.
    Type: Grant
    Filed: January 3, 2019
    Date of Patent: January 14, 2020
    Assignee: V TECHNOLOGY CO., LTD.
    Inventors: Michinobu Mizumura, Makoto Hatanaka, Tetsuya Kiguchi
  • Publication number: 20190140103
    Abstract: The present invention provides a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer, which are laminated on a substrate. The semiconductor layer is a polysilicon thin film. The polysilicon thin film in regions corresponding to the source electrode and the drain electrode has a smaller crystal grain size than that of the polysilicon thin film in a channel region between the source electrode and the drain electrode.
    Type: Application
    Filed: January 3, 2019
    Publication date: May 9, 2019
    Inventors: Michinobu MIZUMURA, Makoto HATANAKA, Tetsuya KIGUCHI
  • Publication number: 20190074384
    Abstract: The present invention provides a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer, which are laminated on a substrate. The semiconductor layer is a polysilicon thin film. The polysilicon thin film in regions corresponding to the source electrode and the drain electrode has a smaller crystal grain size than that of the polysilicon thin film in a channel region between the source electrode and the drain electrode.
    Type: Application
    Filed: November 7, 2018
    Publication date: March 7, 2019
    Inventors: Michinobu MIZUMURA, Makoto HATANAKA, Tetsuya KIGUCHI
  • Patent number: 10211343
    Abstract: The present invention provides a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer, which are laminated on a substrate. The semiconductor layer is a polysilicon thin film. The polysilicon thin film in regions corresponding to the source electrode and the drain electrode has a smaller crystal grain size than that of the polysilicon thin film in a channel region between the source electrode and the drain electrode.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: February 19, 2019
    Assignee: V TECHNOLOGY CO., LTD.
    Inventors: Michinobu Mizumura, Makoto Hatanaka, Tetsuya Kiguchi
  • Publication number: 20170236948
    Abstract: The present invention provides a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer, which are laminated on a substrate. The semiconductor layer is a polysilicon thin film. The polysilicon thin film in regions corresponding to the source electrode and the drain electrode has a smaller crystal grain size than that of the polysilicon thin film in a channel region between the source electrode and the drain electrode.
    Type: Application
    Filed: May 1, 2017
    Publication date: August 17, 2017
    Inventors: Michinobu MIZUMURA, Makoto HATANAKA, Tetsuya KIGUCHI
  • Patent number: 9054494
    Abstract: A pulsed laser oscillator includes at least one first electrooptical element that polarizes light according to an applied voltage and a voltage control unit that applies a voltage to the first electrooptical element and controls the voltage. The voltage control unit changes over time a voltage value applied to the first electrooptical element, to control a pulse width of laser light.
    Type: Grant
    Filed: January 9, 2014
    Date of Patent: June 9, 2015
    Assignee: V TECHNOLOGY CO., LTD.
    Inventors: Koichi Kajiyama, Michinobu Mizumura, Tetsuya Kiguchi, Daisuke Ishii, Yoshikatsu Yanagawa, Masami Takimoto
  • Publication number: 20140126591
    Abstract: A pulsed laser oscillator includes at least one first electrooptical element that polarizes light according to an applied voltage and a voltage control unit that applies a voltage to the first electrooptical element and controls the voltage. The voltage control unit changes over time a voltage value applied to the first electrooptical element, to control a pulse width of laser light.
    Type: Application
    Filed: January 9, 2014
    Publication date: May 8, 2014
    Applicant: V TECHNOLOGY CO., LTD.
    Inventors: Koichi KAJIYAMA, Michinobu Mizumura, Tetsuya Kiguchi, Daisuke Ishii, Yoshikatsu Yanagawa, Masami Takimoto