Patents by Inventor Tetsuya Koishi

Tetsuya Koishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8547125
    Abstract: Provided is a test apparatus for testing at least one device under test, including: a test module that includes a plurality of test sections, the plurality of test sections testing the device under test by exchanging signals with the device under test; and a plurality of test control sections that control the plurality of test sections, where the test module includes the plurality of test sections; a setting storage section that stores setting as to which of the plurality of test control sections should be associated with each of the plurality of test sections; and an interface section that is connected to the plurality of test sections, provides an access request issued from one of the plurality of test control sections and directed to the test module, to a test section associated with the test control section, and is able to set, independently for each of the plurality of test sections, which of the plurality of test control sections should control the test section.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: October 1, 2013
    Assignee: Advantest Corporation
    Inventors: Tadashi Morita, Tetsuya Koishi, Takeshi Yaguchi
  • Publication number: 20110181309
    Abstract: Provided is a test apparatus for testing at least one device under test, including: a test module that includes a plurality of test sections, the plurality of test sections testing the device under test by exchanging signals with the device under test; and a plurality of test control sections that control the plurality of test sections, where the test module includes the plurality of test sections; a setting storage section that stores setting as to which of the plurality of test control sections should be associated with each of the plurality of test sections; and an interface section that is connected to the plurality of test sections, provides an access request issued from one of the plurality of test control sections and directed to the test module, to a test section associated with the test control section, and is able to set, independently for each of the plurality of test sections, which of the plurality of test control sections should control the test section.
    Type: Application
    Filed: January 26, 2010
    Publication date: July 28, 2011
    Applicant: ADVANTEST CORPORATION
    Inventors: Tadashi MORITA, Tetsuya KOISHI, Takeshi YAGUCHI
  • Patent number: 7728615
    Abstract: Provided is a test apparatus that tests a device under test, including a test head that generates a test signal for testing the device under test; a socket board onto which is mounted the device under test, that transmits signals between the test head and the device under test; a plurality of actuators that are disposed on a lower surface of the socket board to correspond one-to-one with support positions thereof, and that each have a state thereof changed according to a control signal supplied thereto to independently move the corresponding support position in a direction vertical to the lower surface of the socket board; and a connection control section that supplies a first control signal to each actuator to set each actuator to be in the same state, and thereafter supplies commonly to each actuator a second control signal that gradually decreases an apparatus separation distance between the socket board and the test head.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: June 1, 2010
    Assignee: Advantest Corporation
    Inventor: Tetsuya Koishi
  • Publication number: 20090066340
    Abstract: Provided is a test apparatus that tests a device under test, including a test head that generates a test signal for testing the device under test; a socket board onto which is mounted the device under test, that transmits signals between the test head and the device under test; a plurality of actuators that are disposed on a lower surface of the socket board to correspond one-to-one with support positions thereof, and that each have a state thereof changed according to a control signal supplied thereto to independently move the corresponding support position in a direction vertical to the lower surface of the socket board; and a connection control section that supplies a first control signal to each actuator to set each actuator to be in the same state, and thereafter supplies commonly to each actuator a second control signal that gradually decreases an apparatus separation distance between the socket board and the test head.
    Type: Application
    Filed: March 13, 2008
    Publication date: March 12, 2009
    Applicant: ADVANTEST CORPORATION
    Inventor: Tetsuya KOISHI
  • Patent number: 5463639
    Abstract: An automatic pattern synchronizing circuit re-times the phase differences between clocks, thereby adjusting test pattern outputs from a device under test. The automatic pattern synchronizing circuit includes a reference voltage generator for providing a threshold voltage, a comparator for converting an input signal into a rectangular signal, a flip-flop, a pattern-counter part for counting a signal from the flip-flop and a control part for setting the threshold voltage in the comparator. The automatic pattern synchronizing circuit automatically synchronizes voltage patterns. In particular, the high and low voltage levels of the input waveform are automatically measured and the optimum threshold voltage is automatically set.
    Type: Grant
    Filed: April 28, 1994
    Date of Patent: October 31, 1995
    Assignee: Advantest Corporation
    Inventors: Tetsuya Koishi, Noboru Akiyama, Yasuto Kumai