Patents by Inventor Tetsuya Nakai
Tetsuya Nakai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170299095Abstract: A pipe joint includes clamp members including a pipe joint main body unit having an arc shape, flange portions protruding at both ends in an axial direction of the pipe joint main body unit, fixed flange units at both ends in a diameter direction of the pipe joint main body unit, and fixing units formed in the fixed flange units. When the clamp members are attached at end portions of pipes to be connected, and the fixing unit is inserted into insertion units, the pipe joint connects the pipes. The flange portions are provided along an entire periphery of the pipe joint main body unit, and the flange portion of one of the clamp members and the flange portion of the other of the clamp members have joint surface units that contact each other with inclinations at a same angle with respect to an axial direction of the pipe.Type: ApplicationFiled: July 5, 2017Publication date: October 19, 2017Applicant: NAGASHIMA MANUFACTURING CO., LTD.Inventors: Takeshi NAGASHIMA, Toru HIRASAWA, Kazushige KAMEDA, Tetsuya NAKAI, Shinsuke MORISAWA, Yui SUZUKI, Ryoya NAKAHARA, Yuto TAYA, Yuki MATSUDA, Mariko MORITA, Hiromi KAMATA
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Publication number: 20170082136Abstract: A fastening structure includes a bolt, a nut screwed onto the bolt to fasten a target part, and a washer sandwiched between the target part and the nut. The washer is formed in a disk shape having a hole in which the bolt is inserted. The nut has a main body formed in a hexagonal pillar shape having a hole in which the bolt is inserted and a disk portion extending from an axial end of the main body. Protrusions are circumferentially distributed on a face of the disk portion, the face being on the side opposite the main body. The protrusions bite into a nut-side face of the washer to form meshed portions by screwing together the bolt and the nut.Type: ApplicationFiled: January 26, 2016Publication date: March 23, 2017Applicant: NAGASHIMA MANUFACTURING CO., LTD.Inventors: Takeshi NAGASHIMA, Toru HIRASAWA, Kazushige KAMEDA, Tetsuya NAKAI, Shinsuke MORISAWA, Yui SUZUKI, Ryoya NAKAHARA, Yuto TAYA, Yuki MATSUDA, Mariko MORITA, Hiromi KAMATA
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Publication number: 20170082228Abstract: A pipe joint includes clamp members including a pipe joint main body unit having an arc shape, flange portions protruding at both ends in an axial direction of the pipe joint main body unit, fixed flange units at both ends in a diameter direction of the pipe joint main body unit, and fixing units formed in the fixed flange units. When the clamp members are attached at end portions of pipes to be connected, and the fixing unit is inserted into insertion units, the pipe joint connects the pipes. The flange portions are provided along an entire periphery of the pipe joint main body unit, and the flange portion of one of the clamp members and the flange portion of the other of the clamp members have joint surface units that contact each other with inclinations at a same angle with respect to an axial direction of the pipe.Type: ApplicationFiled: January 26, 2016Publication date: March 23, 2017Applicant: NAGASHIMA MANUFACTURING CO., LTD.Inventors: TAKESHI NAGASHIMA, TORU HIRASAWA, KAZUSHIGE KAMEDA, TETSUYA NAKAI, SHINSUKE MORISAWA, YUI SUZUKI, RYOYA NAKAHARA, YUTO TAYA, YUKI MATSUDA, MARIKO MORITA, HIROMI KAMATA
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Publication number: 20130012008Abstract: The present invention provides a method of producing a high quality SOI wafer having a thin BOX layer with high productivity. In the method of producing an SOI wafer by performing heat treatment on a silicon wafer after implanting oxygen ions into silicon wafer, first ion implantation is performed on the silicon wafer to a high dose of 2×1017 ions/cm2 to 3×1017 ions/cm2, and then second ion implantation is performed to a low dose of 5×1014 ions/cm2 to 1×1016 ions/cm2. Subsequently, heat treatment is performed in a high oxygen concentration atmosphere at an oxygen partial pressure ratio of 10% to 80%, and then heat treatment is performed in a low oxygen atmosphere at an oxygen partial pressure ratio of less than 10%. After that, heat treatment is performed in a chlorine-containing gas atmosphere by adjusting the oxygen atmosphere to the chlorine-containing gas atmosphere by flowing argon through a chlorine-containing solution.Type: ApplicationFiled: March 23, 2011Publication date: January 10, 2013Inventors: Bong-Gyun Ko, Tetsuya Nakai
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Patent number: 8222124Abstract: This method for manufacturing a SIMOX wafer includes: forming a mask layer on one surface side of a silicon single crystal wafer, which has an opening on a region where a BOX layer is to be formed; implanting oxygen ions through the opening of the mask layer into the silicon single crystal wafer to a predetermined depth, and locally forming an oxygen implantation region; annealing the silicon single crystal wafer with the mask layer, and oxidizing the oxygen implantation region so as to form the BOX layer; and removing a coated oxide film that covers the whole silicon single crystal wafer which is formed in the annealing of the silicon single crystal wafer, wherein the mask layer has a lamination comprising an oxide film and either one or both of a polysilicon film and an amorphous silicon film.Type: GrantFiled: June 24, 2010Date of Patent: July 17, 2012Assignee: Sumco CorporationInventor: Tetsuya Nakai
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Patent number: 7943497Abstract: A substrate surface serving as an SOI region and a substrate surface serving as a bulk region are made to form the same plane easily and highly accurately, a thickness of a buried oxide film is made uniform, and the buried oxide film is also prevented from being exposed on the substrate surface. After partially forming a mask oxide film (19) on a surface of a silicon substrate (12), an oxygen ions (16) are implanted into the surface of the substrate through this mask oxide film, and the substrate is further subjected to annealing treatment to form a buried oxide film (13) inside the substrate. Between the step of forming the mask oxide film and the step of implanting the oxygen ions, a recess portion (12c) with a predetermined depth deeper than a substrate surface (12b) serving as the bulk region where the mask oxide film has been formed is formed in a substrate surface (12a) serving as the SOI region where the mask oxide film is not formed.Type: GrantFiled: November 17, 2006Date of Patent: May 17, 2011Assignee: Sumco CorporationInventor: Tetsuya Nakai
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Publication number: 20100327397Abstract: This method for manufacturing a SIMOX wafer includes: forming a mask layer on one surface side of a silicon single crystal wafer, which has an opening on a region where a BOX layer is to be formed; implanting oxygen ions through the opening of the mask layer into the silicon single crystal wafer to a predetermined depth, and locally forming an oxygen implantation region; annealing the silicon single crystal wafer with the mask layer, and oxidizing the oxygen implantation region so as to form the BOX layer; and removing a coated oxide film that covers the whole silicon single crystal wafer which is formed in the annealing of the silicon single crystal wafer, wherein the mask layer has a lamination comprising an oxide film and either one or both of a polysilicon film and an amorphous silicon film.Type: ApplicationFiled: June 24, 2010Publication date: December 30, 2010Applicant: SUMCO CORPORATIONInventor: Tetsuya NAKAI
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Patent number: 7838387Abstract: A silicon wafer includes a principal face for forming electronic devices; an end region; and a tapered region which is located between the principal face and the end region, in which the thickness of the silicon wafer is gradually reduced, and which has a slope that makes an angle of greater than zero degree and less than 9.5 degrees or an angle of greater than 19 degrees with the principal face. An SOI wafer prepared by forming a buried oxide layer in a silicon wafer includes a principal face, end region, and tapered region that are substantially the same as those described above. A method for manufacturing an SOI wafer includes the steps of implanting oxygen ions into a silicon wafer; and heat-treating the resulting silicon wafer such that a buried oxide layer is formed in the silicon wafer.Type: GrantFiled: May 12, 2008Date of Patent: November 23, 2010Assignee: Sumco CorporationInventors: Eiji Kamiyama, Seiichi Nakamura, Tetsuya Nakai
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Patent number: 7811878Abstract: To easily and accurately flush a substrate surface serving an SOI area with a substrate surface serving as a bulk area, make a buried oxide film, and prevent an oxide film from being exposed on substrate surface. After partially forming a mask oxide film 23 on the surface of a substrate 12 constituted of single crystal silicon, oxygen ions 16 are implanted into the surface of the substrate through the mask oxide film, and the substrate is annealed to form an buried oxide film 13 inside the substrate. Further included is a step of forming a predetermined-depth concave portion 12c deeper than substrate surface 12b serving as a bulk area on which the mask oxide film is formed on the substrate surface 12a serving as an SOI area by forming a thermally grown oxide film 21 on the substrate surface 12a serving as an SOI area on which the mask oxide film is not formed between the step of forming the mask oxide film and the step of implanting oxygen ions.Type: GrantFiled: April 14, 2009Date of Patent: October 12, 2010Assignees: Sumco Corporation, Kabushiki Kaisha ToshibaInventors: Tetsuya Nakai, Bong-Gyun Ko, Takeshi Hamamoto, Takashi Yamada
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Patent number: 7807545Abstract: A SIMOX wafer having a BOX layer with a thin film thickness is obtained without a reduction in productivity or deterioration in quality. In a method for manufacturing a SIMOX wafer comprising: a step of forming a first ion-implanted layer in a silicon wafer; a step of forming a second ion-implanted layer that is in an amorphous state; and a high-temperature heat treatment step of maintaining the wafer in an oxygen contained atmosphere at a temperature that is not lower than 1300° C. but less than a silicon melting point for 6 to 36 hours to change the first and the second ion-implanted layers into a BOX layer, a gas containing chlorine that is not less than 0.1 volume % but less than 1.0 volume % is mixed into an atmosphere during temperature elevation in the high-temperature heat treatment.Type: GrantFiled: February 2, 2007Date of Patent: October 5, 2010Assignee: Sumco CorporationInventors: Yoshiro Aoki, Yukio Komatsu, Tetsuya Nakai, Seiichi Nakamura
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Patent number: 7655315Abstract: A silicon wafer includes a principal face for forming electronic devices; an end region; and a tapered region which is located between the principal face and the end region, in which the thickness of the silicon wafer is gradually reduced, and which has a slope that makes an angle of greater than zero degree and less than 9.5 degrees or an angle of greater than 19 degrees with the principal face. An SOI wafer prepared by forming a buried oxide layer in a silicon wafer includes a principal face, end region, and tapered region that are substantially the same as those described above. A method for manufacturing an SOI wafer includes the steps of implanting oxygen ions into a silicon wafer; and heat-treating the resulting silicon wafer such that a buried oxide layer is formed in the silicon wafer.Type: GrantFiled: January 13, 2006Date of Patent: February 2, 2010Assignee: Sumco CorporationInventors: Eiji Kamiyama, Seiichi Nakamura, Tetsuya Nakai
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Patent number: 7632735Abstract: A process for manufacturing a silicon-on-insulator substrate comprising a single-crystal silicon substrate in which an oxide layer has been locally buried includes forming a step on the silicon substrate so that a region corresponding to the oxide layer has a greater surface height than other regions; then implanting oxygen ions in the silicon substrate so as to form the oxide layer.Type: GrantFiled: September 29, 2006Date of Patent: December 15, 2009Assignee: Sumco CorporationInventor: Tetsuya Nakai
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Publication number: 20090203187Abstract: To easily and accurately flush a substrate surface serving an SOI area with a substrate surface serving as a bulk area, make a buried oxide film, and prevent an oxide film from being exposed on substrate surface. After partially forming a mask oxide film 23 on the surface of a substrate 12 constituted of single crystal silicon, oxygen ions 16 are implanted into the surface of the substrate through the mask oxide film, and the substrate is annealed to form an buried oxide film 13 inside the substrate. Further included is a step of forming a predetermined-depth concave portion 12c deeper than substrate surface 12b serving as a bulk area on which the mask oxide film is formed on the substrate surface 12a serving as an SOI area by forming a thermally grown oxide film 21 on the substrate surface 12a serving as an SOI area on which the mask oxide film is not formed between the step of forming the mask oxide film and the step of implanting oxygen ions.Type: ApplicationFiled: April 14, 2009Publication date: August 13, 2009Applicants: SUMCO CORPORATION, KABUSHIKI KAISHA TOSHIBAInventors: Tetsuya NAKAI, Bong-Gyun KO, Takeshi HAMAMOTO, Takashi YAMADA
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Publication number: 20090152671Abstract: This method for manufacturing a SIMOX wafer includes: heating a silicon wafer to 300° C. or more and implanting oxygen ions so as to form a high oxygen concentration layer within the silicon wafer; subjecting the silicon wafer to a cooling to less than 300° C. and an implanting of oxygen ions so as to form an amorphous layer; and subjecting the silicon wafer to a heat-treating in a mixed gas atmosphere containing oxygen so as to form a buried oxide layer. In the forming of the buried oxide layer, a starting temperature is less than 1350° C. and a maximum temperature is 1350° C. or more. This SIMOX wafer is manufactured by the above method and includes a BOX layer and a SOI layer on the BOX layer. The BOX layer has a thickness of 1300 ? or more and a breakdown voltage of 7 MV/cm or more, and the surface of the SOI layer and the interface between the SOI layer and the BOX layer have a roughness over a 10-?m square area of 4 ? rms or less.Type: ApplicationFiled: February 19, 2009Publication date: June 18, 2009Applicant: Sumco CorporationInventors: Yoshiro Aoki, Yukio Komatsu, Tetsuya Nakai, Seiichi Nakamura
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Patent number: 7537989Abstract: To easily and accurately flush a substrate surface serving an SOI area with a substrate surface serving as a bulk area, make a buried oxide film, and prevent an oxide film from being exposed on substrate surface. After partially forming a mask oxide film 23 on the surface of a substrate 12 constituted of single crystal silicon, oxygen ions 16 are implanted into the surface of the substrate through the mask oxide film, and the substrate is annealed to form a buried oxide film 13 inside the substrate. Further included is a step of forming a predetermined-depth concave portion 12c deeper than substrate surface 12b serving as a bulk area on which the mask oxide film is formed on the substrate surface 12a serving as an SOI area by forming a thermally grown oxide film 21 on the substrate surface 12a serving as an SOI area on which the mask oxide film is not formed between the step of forming the mask oxide film and the step of implanting oxygen ions.Type: GrantFiled: November 13, 2006Date of Patent: May 26, 2009Assignees: Sumco Corporation, Kabushiki Kaisha ToshibaInventors: Tetsuya Nakai, Bong-Gyun Ko, Takeshi Hamamoto, Takashi Yamada
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Publication number: 20090130816Abstract: This method for manufacturing a SIMOX wafer, includes: implanting oxygen ions in a silicon wafer; cleaning said silicon wafer into which said oxygen ions are implanted; and forming a buried oxide film within an interior of said silicon wafer by subjecting said cleaned silicon wafer to a heat treatment, wherein said method further includes immersing said silicon wafer in an aqueous solution of hydrofluoric acid and etching a SiO2 film formed on a surface of said silicon wafer, which is conducted after said implanting of oxygen ions in said silicon wafer, but prior to said cleaning of said silicon wafer, and an etching rate for said SiO2 film by said aqueous solution of hydrofluoric acid during said etching treatment is within a range from 150 to 3,000 (?/minute).Type: ApplicationFiled: July 22, 2005Publication date: May 21, 2009Applicant: SUMCO CORPORATIONInventors: Isao Takahashi, Tetsuya Nakai
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Patent number: 7514343Abstract: This method for manufacturing a SIMOX wafer includes: heating a silicon wafer to 300° C. or more and implanting oxygen ions so as to form a high oxygen concentration layer within the silicon wafer; subjecting the silicon wafer to a cooling to less than 300° C. and an implanting of oxygen ions so as to form an amorphous layer; and subjecting the silicon wafer to a heat-treating in a mixed gas atmosphere containing oxygen so as to form a buried oxide layer. In the forming of the buried oxide layer, a starting temperature is less than 1350° C. and a maximum temperature is 1350° C. or more. This SIMOX wafer is manufactured by the above method and includes a BOX layer and a SOI layer on the BOX layer. The BOX layer has a thickness of 1300 ? or more and a breakdown voltage of 7 MV/cm or more, and the surface of the SOI layer and the interface between the SOI layer and the BOX layer have a roughness over a 10-?m square area of 4 ? rms or less.Type: GrantFiled: June 8, 2006Date of Patent: April 7, 2009Assignee: Sumco CorporationInventors: Yoshiro Aoki, Yukio Komatsu, Tetsuya Nakai, Seiichi Nakamura
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Publication number: 20080242048Abstract: To easily and accurately flush a substrate surface serving an SOI area with a substrate surface serving as a bulk area, make a buried oxide film, and prevent an oxide film from being exposed on substrate surface. After partially forming a mask oxide film 23 on the surface of a substrate 12 constituted of single crystal silicon, oxygen ions 16 are implanted into the surface of the substrate through the mask oxide film, and the substrate is annealed to form an buried oxide film 13 inside the substrate. Further included is a step of forming a predetermined-depth concave portion 12c deeper than substrate surface 12b serving as a bulk area on which the mask oxide film is formed on the substrate surface 12a serving as an SOI area by forming a thermally grown oxide film 21 on the substrate surface 12a serving as an SOI area on which the mask oxide film is not formed between the step of forming the mask oxide film and the step of implanting oxygen ions.Type: ApplicationFiled: November 13, 2006Publication date: October 2, 2008Applicants: SUMCO CORPORATION, TOSHIBA CORPORATIONInventors: Tetsuya Nakai, Bong Gyun Ko, Takeshi Hamamoto, Takashi Yamada
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Publication number: 20080213989Abstract: A silicon wafer includes a principal face for forming electronic devices; an end region; and a tapered region which is located between the principal face and the end region, in which the thickness of the silicon wafer is gradually reduced, and which has a slope that makes an angle of greater than zero degree and less than 9.5 degrees or an angle of greater than 19 degrees with the principal face. An SOI wafer prepared by forming a buried oxide layer in a silicon wafer includes a principal face, end region, and tapered region that are substantially the same as those described above. A method for manufacturing an SOI wafer includes the steps of implanting oxygen ions into a silicon wafer; and heat-treating the resulting silicon wafer such that a buried oxide layer is formed in the silicon wafer.Type: ApplicationFiled: May 12, 2008Publication date: September 4, 2008Inventors: Eiji Kamiyama, Seiichi Nakamura, Tetsuya Nakai
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Publication number: 20070224773Abstract: A SIMOX wafer is produced at an oxygen ion implantation step and a high-temperature annealing step, wherein an oxide film is formed on a surface of a wafer prior to the oxygen ion implantation and then the oxygen ion implantation is conducted through the oxide film.Type: ApplicationFiled: March 27, 2007Publication date: September 27, 2007Applicant: SUMCO CORPORATIONInventors: Yoshio Murakami, Tetsuya Nakai