Patents by Inventor Tetsuya Oosaka

Tetsuya Oosaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7498967
    Abstract: The semiconductor device includes: an A/D conversion circuit for A/D-converting an analog input signal and outputting a resultant conversion result; and a computation circuit for performing, in synchronization with the A/D conversion circuit, computation for an updated conversion result without storing the updated conversion result every time the conversion result from the A/D conversion circuit is updated, to determine one computation result from a plurality of conversion results from the A/D conversion circuit and output the computation result.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: March 3, 2009
    Assignee: Panasonic Corporation
    Inventors: Masaya Hirose, Kinya Daio, Tetsuya Oosaka, Tomoko Nobekawa
  • Patent number: 7479908
    Abstract: A semiconductor device includes: an A/D converter; a digital processing circuit for performing processing based on conversion results from the A/D converter; a first test circuit for performing operation processing for checking a nonlinearity error (INLE) of the conversion results from the A/D converter; and a second test circuit for performing operation processing for checking a differential nonlinearity error (DNLE) of the conversion results from the A/D converter. The first test circuit performs only part of the operation processing for checking the nonlinearity error (INLE) of the conversion results from the A/D converter. The second test circuit performs only part of the operation processing for checking the differential nonlinearity error (DNLE) of the conversion results from the A/D converter.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: January 20, 2009
    Assignee: Panasonic Corporation
    Inventors: Masaya Hirose, Kinya Daio, Tetsuya Oosaka
  • Patent number: 7456763
    Abstract: The semiconductor device includes: an A/D conversion circuit; a digital processing circuit for performing processing based on conversion results of the A/D conversion circuit; and an output terminal for testing for outputting the conversion results of the A/D conversion circuit externally. The output of the conversion results from the output terminal for testing is made at timing that is different from timing of other conversion operation of which conversion results are to be outputted later and is longer in cycle than timing of conversion operation.
    Type: Grant
    Filed: January 3, 2007
    Date of Patent: November 25, 2008
    Assignee: Panasonic Corporation
    Inventors: Masaya Hirose, Kinya Daio, Tetsuya Oosaka
  • Publication number: 20080007439
    Abstract: A semiconductor device includes: an A/D converter; a digital processing circuit for performing processing based on conversion results from the A/D converter; a first test circuit for performing operation processing for checking a nonlinearity error (INLE) of the conversion results from the A/D converter; and a second test circuit for performing operation processing for checking a differential nonlinearity error (DNLE) of the conversion results from the A/D converter. The first test circuit performs only part of the operation processing for checking the nonlinearity error (INLE) of the conversion results from the A/D converter. The second test circuit performs only part of the operation processing for checking the differential nonlinearity error (DNLE) of the conversion results from the A/D converter.
    Type: Application
    Filed: June 1, 2007
    Publication date: January 10, 2008
    Inventors: Masaya Hirose, Kinya Daio, Tetsuya Oosaka
  • Publication number: 20080007440
    Abstract: The semiconductor device of the present invention includes: an A/D conversion circuit for A/D-converting an analog input signal and outputting a resultant conversion result; and a computation circuit for performing, in synchronization with the A/D conversion circuit, computation for an updated conversion result without storing the updated conversion result every time the conversion result from the A/D conversion circuit is updated, to determine one computation result from a plurality of conversion results from the A/D conversion circuit and output the computation result.
    Type: Application
    Filed: June 12, 2007
    Publication date: January 10, 2008
    Inventors: Masaya Hirose, Kinya Daio, Tetsuya Oosaka, Tomoko Nobekawa
  • Publication number: 20070164890
    Abstract: The semiconductor device includes: an A/D conversion circuit; a digital processing circuit for performing processing based on conversion results of the A/D conversion circuit; and an output terminal for testing for outputting the conversion results of the A/D conversion circuit externally. The output of the conversion results from the output terminal for testing is made at timing that is different from timing of other conversion operation of which conversion results are to be outputted later and is longer in cycle than timing of conversion operation.
    Type: Application
    Filed: January 3, 2007
    Publication date: July 19, 2007
    Inventors: Masaya Hirose, Kinya Daio, Tetsuya Oosaka