Patents by Inventor Tetsuya Saeki
Tetsuya Saeki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260241903Abstract: A brake device for a railway vehicle to generate a braking force by pressing a friction member against a rotator includes a control command acquirer to acquire a proximate-positioning control command for moving the friction member to be proximate to the rotator without generating a decelerating force, a calculator to calculate a minute output target value being a target value of a force for pressing the friction member against the rotator in response to the proximate-positioning control command, a friction member controller to control movement of the friction member based on the minute output target value, and a braking force sensor to detect a braking force generated between the rotator and the friction member. The calculator determines whether the braking force is generated based on detection information from the braking force sensor, and performs correction to decrease the minute output target value when the braking force is generated.Type: ApplicationFiled: March 23, 2023Publication date: August 20, 2026Applicant: Mitsubishi Electric CorporationInventors: Tetsuya SAEKI, Hidetoshi KITANAKA, Tsutomu NISHIOKA, Etsuji MATSUYAMA
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Patent number: 11904826Abstract: A degradation detection system includes: a storage that stores measured values of command pressure and measured values of response pressure; and a simulator that calculates, using a physical model, the response pressure in accordance with the command pressure, thereby obtaining a waveform of the calculated response pressure corresponding to a waveform of the command pressure in a case in which the command pressure is changed. A waveform identifier identifies a waveform of the calculated response pressure that matches a waveform of the detected response pressure. A degradation identifier identifies a degraded component of a pressure regulating valve from a value of parameter acquired by the waveform identifier and a normal range defined for the parameter.Type: GrantFiled: May 21, 2018Date of Patent: February 20, 2024Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Tetsuya Saeki, Koji Shiratsuchi
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Publication number: 20210245726Abstract: A degradation detection system includes: a storage that stores measured values of command pressure and measured values of response pressure; and a simulator that calculates, using a physical model, the response pressure in accordance with the command pressure, thereby obtaining a waveform of the calculated response pressure corresponding to a waveform of the command pressure in a case in which the command pressure is changed. A waveform identifier identifies a waveform of the calculated response pressure that matches a waveform of the detected response pressure. A degradation identifier identifies a degraded component of a pressure regulating valve from a value of parameter acquired by the waveform identifier and a normal range defined for the parameter.Type: ApplicationFiled: May 21, 2018Publication date: August 12, 2021Applicant: Mitsubishi Electric CorporationInventors: Tetsuya SAEKI, Koji SHIRATSUCHI
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Patent number: 7296558Abstract: A dual-injector fuel injection engine includes a cylinder block, a cylinder head, an intake port, an intake manifold, a surge tank, an in-cylinder injector, an intake pipe injector, and first and second delivery pipes. The in-cylinder injector is positioned below the intake port, when seen from an axial direction of a crank shaft, and attached to the cylinder head. The intake pipe injector and the second delivery pipe are supported above the intake port, when seen from the axial direction of the crank shaft, by the intake manifold to be close to the intake port.Type: GrantFiled: March 17, 2006Date of Patent: November 20, 2007Assignees: Yamaha Hatsudoki Kabushiki Kaisha, Toyota Jidosha Kabushiki KaishaInventors: Tetsuya Saeki, Shizuo Abe, Tomihisa Tsuchiya, Terutoshi Tomoda, Shinichi Kurosawa, Masaki Katou, Akira Yamaguchi, Yuichi Suzuki
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Publication number: 20060207527Abstract: A dual-injector fuel injection engine includes a cylinder block, a cylinder head, an intake port, an intake manifold, a surge tank, an in-cylinder injector, an intake pipe injector, and first and second delivery pipes. The in-cylinder injector is positioned below the intake port, when seen from an axial direction of a crank shaft, and attached to the cylinder head. The intake pipe injector and the second delivery pipe are supported above the intake port, when seen from the axial direction of the crank shaft, by the intake manifold to be close to the intake port.Type: ApplicationFiled: March 17, 2006Publication date: September 21, 2006Inventors: Tetsuya Saeki, Shizuo Abe, Tomihisa Tsuchiya, Terutoshi Tomoda, Shinichi Kurosawa, Masaki Katou, Akira Yamaguchi, Yuichi Suzuki
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Patent number: 6439622Abstract: There is difference between coefficients of thermal expansion of the first member and the second member. A mismatch occurs between the walls of the first member and the second member when the temperature is changed significantly. Stress generated by this mismatch is distributed among and received by respective fitting sections of respective concave portions and respective convex portions. Because these fitting sections exist above and below the joining member, stress generated by the mismatch is distributed and received by the fitting sections before the stress reaches the joining member. Therefore, only a little stress acts on the joining member.Type: GrantFiled: October 6, 1999Date of Patent: August 27, 2002Assignee: Toyoda Boshoku CorporationInventors: Takane Iwatsuki, Tetsuya Saeki
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Patent number: 5487040Abstract: To provide a type of semiconductor memory device characterized by the fact that the area occupied by the redundant memory address decoder on the chip is minimized without reducing the redundancy of the defective memory, and hence the cost of the semiconductor memory device can be cut.It has both redundant decoders that select the redundant memory in response to the all address bits and the redundant decoders which select the redundant memory group in response to a portion of the address bits, so as to increase the efficiency in saving the defective memory.Type: GrantFiled: July 12, 1993Date of Patent: January 23, 1996Assignees: Texas Instruments Incorporated, Hitachi Ltd.Inventors: Shunichi Sukegawa, Tetsuya Saeki
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Patent number: 5422850Abstract: To provide a type of semiconductor memory device characterized by the fact that the redundancy for the defective memory of defective bits is increased and the area occupied by the redundant memory address decoder on the chip is minimized, thereby reducing the cost of the semiconductor memory device. It has multiple fuse decoders which are commonly connected to the address bus and are programmed for the different addresses, and it has a redundant address decoder which detects coincidence/uncoincidence between the outputs of the two decoders and generates a redundant address coincidence signal, so as to increase the efficiency in repairing the defective memory.Type: GrantFiled: July 12, 1993Date of Patent: June 6, 1995Assignees: Texas Instruments Incorporated, Hitachi Ltd.Inventors: Shunichi Sukegawa, Tetsuya Saeki
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Patent number: 4947373Abstract: A semiconductor memory is provided with a first memory cell group, a second memory cell group, a first register for a serial output operation for holding information related to the first memory cell group, a second register for a serial output operation for holding information related to the second memory cell group, and transfer means for transferring information related to either the first or second memory cell group to either the first or second serial output register. By virtue of this arrangement, while the information transferred to the first serial output register is being serially output therefrom, information can simultaneously be transferred to the second serial output register by the transfer means.Type: GrantFiled: December 17, 1987Date of Patent: August 7, 1990Assignees: Hitachi, Ltd., Hitachi VLSI Engineering Corp.Inventors: Yasunori Yamaguchi, Katsuyuki Sato, Jun Mitake, Hitoshi Kawaguchi, Masahiro Yoshida, Terutaka Okada, Makoto Morino, Tetsuya Saeki, Yosuke Yukawa, Osamu Nagashima