Patents by Inventor Tetsuya Sakairi

Tetsuya Sakairi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090252549
    Abstract: A spline connection structure is provided with a shaft spline and a bore spline. The shaft spline is comprised of plural involute teeth formed on a shaft, while the bore spline is comprised of plural involute teeth formed on a hub and maintained in engagement with the teeth of the shaft spline. The hub is provided with at least one cylindrical hole and a thin wall portion facing a lower end portion of the cylindrical hole. The thin wall portion is pressed by a pressing member inserted in the cylindrical hole to widen an interval between at least two of the teeth of the bore spline, said at least two teeth being located in a vicinity of the thin wall portion, such that at least one of the at least two teeth is pressed against at least one associated tooth of the teeth of the shaft spline and is restrained to restrict movement of the hub relative to the shaft.
    Type: Application
    Filed: April 6, 2009
    Publication date: October 8, 2009
    Applicant: Hitachi Construction Machinery Co., Ltd.
    Inventors: Yoshinori Takeuchi, Naoyuki Okuno, Tetsuya Sakairi, Youichi Iltsuka
  • Publication number: 20050216614
    Abstract: A microcomputer comprises an instruction RAM temporally storing a program transferred from an external memory, a CPU reading out the program from the instruction RAM via a dedicated fetch bus and carrying out a process according to the program, an instruction transfer control circuit directly transferring the program from the external memory to the instruction RAM via a dedicated transfer bus, and a transfer information register temporally storing instruction transfer information which has been stored in the external memory and is necessary information for transferring the program from the external memory to the instruction RAM by the instruction transfer control circuit.
    Type: Application
    Filed: February 10, 2005
    Publication date: September 29, 2005
    Inventor: Tetsuya Sakairi
  • Patent number: 6408353
    Abstract: In a microcomputer including a CPU, at least one peripheral unit and a bus control unit connected therebetween, the bus control unit is constructed by a bus control circuit for controlling transfer of data, a strobe signal generating circuit for generating a strobe signal and transmitting the strobe signal to the peripheral unit, a flip-flop for sampling a retry requesting signal from the peripheral unit in synchronization with the strobe signal to generate a strobe requesting signal, and a strobe requesting signal detecting circuit for detecting the strobe requesting signal to reset the flip-flop. The bus control circuit receives the strobe requesting signal to transfer data from the CPU to the peripheral unit. The strobe signal generating circuit receives the strobe requesting signal to generate another strobe signal.
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: June 18, 2002
    Assignee: NEC Corporation
    Inventor: Tetsuya Sakairi
  • Patent number: 6009260
    Abstract: In an emulation device comprising an emulation unit having a debugging function and a probe for use in connecting the emulation unit with a target system, the probe comprises a cable assembly for use in connecting it to the emulation unit and a probe connector having an analog circuit to emulate at least a part of functions of the target system. A power supply and a ground for the analog circuit are connected to an external system via a first power supply line and a first ground line, respectively, that are independent of the cable assembly.
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: December 28, 1999
    Assignee: NEC Corporation
    Inventor: Tetsuya Sakairi