Patents by Inventor Tetsuya Suemitsu

Tetsuya Suemitsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    Publication number: 20260075865
    Abstract: In a first step S101, a first region in which a polarity inversion layer is formed, and a second region in which the polarity inversion layer is not formed are provided on a substrate. Next, in a second step S102, a first nitride semiconductor is epitaxially grown on the substrate having the first region and the second region along the c-axis direction such that a first semiconductor layer is formed. Next, in a third step S103, a second nitride semiconductor is epitaxially grown on the first semiconductor layer along the c-axis direction such that a second semiconductor layer is formed on the first semiconductor layer. The second nitride semiconductor has different polarization, electron affinity, and band-gap energy from the first nitride semiconductor. The second semiconductor layer forms a heterojunction with the first semiconductor layer. The interface therebetween has a polarization charge, which is positive or negative depending on polarity.
    Type: Application
    Filed: August 9, 2022
    Publication date: March 12, 2026
    Inventors: Takashi MATSUOKA, Tetsuya SUEMITSU
  • ANTENNA MODULE AND MANUFACTURING METHOD THEREOF
    Publication number: 20240339747
    Abstract: An antenna module includes: a substrate with at least the top surface being a single crystal of silicon carbide; a single-crystal graphene layer provided in contact with the top surface of the substrate; and a gallium nitride layer on the substrate. The antenna module is characterized in that an antenna element portion is formed by patterning a region in the graphene layer that is not covered by the gallium nitride layer, an active element portion is formed in the gallium nitride layer, and a connection portion connecting the antenna element portion and the active element portion are integrally formed.
    Type: Application
    Filed: October 21, 2022
    Publication date: October 10, 2024
    Applicants: TOHOKU UNIVERSITY, NATIONAL INSTITUTE OF INFORMATION AND COMMUNICATIONS TECHNOLOGY, SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Hirokazu FUKIDOME, Tetsuya SUEMITSU, Issei WATANABE, Minoru KAWAHARA, Shoji AKIYAMA, Yuji TOBISAKA, Makoto KAWAI
  • Heterojunction field effect transistor and method of fabricating the same
    Patent number: 6144048
    Abstract: A Schottky barrier layer in separate regions between a source electrode and a gate electrode and between a drain electrode and the gate electrode is completely covered with an etching stopper layer. The gate electrode is separated from a cap layer.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: November 7, 2000
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Tetsuya Suemitsu, Takatomo Enoki
  • Heterojunction field effect transistor and method of fabricating the same
    Patent number: 6090649
    Abstract: A Schottky barrier layer in separate regions between a source electrode and a gate electrode and between a drain electrode and the gate electrode is completely covered with an etching stopper layer. The gate electrode is separated from a cap layer.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: July 18, 2000
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Tetsuya Suemitsu, Takatomo Enoki