Patents by Inventor Tetsuya Takata

Tetsuya Takata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250105083
    Abstract: An electronic module performing a power function comprises a substrate and a plurality of semiconductor dies disposed on the substrate. The plurality of semiconductor dies operates together to perform a power device function. The semiconductor dies may be identical. The semiconductor die may have a high length-to-width (i.e. aspect) ratio in order to improve the thermal performance of the electronic module. The semiconductor die may be disposed on the substrate in a uniformly spaced pattern to improve the thermal performance, which pattern may be a hexagonal pattern, a linear pattern, or a rectangular pattern. The electronic module may also comprise a driver device coupled to and configured to control the plurality of semiconductor dies. The driver device may be disposed on the substrate between a first semiconductor die of the plurality of semiconductor dies and a second semiconductor die of the plurality of semiconductor dies.
    Type: Application
    Filed: September 27, 2023
    Publication date: March 27, 2025
    Inventors: Amaury Gendron-Hansen, Wang-Chang Albert Gu, Dumitru Gheorge Sdrulla, Tetsuya Takata, Itsuo Yuzurihara, Tomohiro Yoneyama, Yu Hosoyamada
  • Patent number: 12081177
    Abstract: A full-bridge class-D amplifier circuit comprises first through fourth power devices. First conduction terminals of the first and third power devices are coupled to a first power supply voltage, and second conduction terminals of the second and fourth power devices are coupled to a second power supply voltage. A second conduction terminal of the first power device and a first conduction terminal of the second power device are coupled to a first amplifier output. A second conduction terminal of the third power device and a first conduction terminal of the fourth power device are coupled to a second amplifier output. Left and right driver devices respectively disposed adjacent to left and right sides of the first power device have outputs respectively coupled to left and right control terminals respectively disposed on the left and right sides of the first power device.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: September 3, 2024
    Assignees: Analog Power Conversion LLC, Kyosan Electric Manufacturing Co., Ltd.
    Inventors: Sam Seiichiro Ochi, Dumitru Gheorge Sdrulla, W. Albert Gu, Tetsuya Takata, Itsuo Yuzurihara, Tomohiro Yoneyama, Yu Hosoyamada
  • Patent number: 12074226
    Abstract: A semiconductor device comprises a semiconductor die having a first region and a second region, wherein an operating temperature of the second region is lower than an operating temperature of the first region. A plurality of first tubs are respectively disposed in the first region, the second region, or both. The semiconductor device further comprises a power device comprising a plurality of power device cells, and a diode having a plurality of diode cells. The power devices cells are disposed within tubs or portions of tubs that are in the first region, and the diode cells are disposed within tubs or portions of tubs that are in the second region. The power device may comprise a vertical metal oxide semiconductor field effect transistor (MOSFET), and the diode may comprise a vertical Schottky barrier diode (SBD).
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: August 27, 2024
    Assignees: Analog Power Conversion LLC, Kyosan Electric Manufacturing Co., Ltd.
    Inventors: Amaury Gendron-Hansen, Dumitru Gheorge Sdrulla, Leslie Louis Szepesi, Tetsuya Takata, Itsuo Yuzurihara, Tomohiro Yoneyama, Yu Hosoyamada
  • Publication number: 20230080752
    Abstract: A full-bridge class-D amplifier circuit comprises first through fourth power devices. First conduction terminals of the first and third power devices are coupled to a first power supply voltage, and second conduction terminals of the second and fourth power devices are coupled to a second power supply voltage. A second conduction terminal of the first power device and a first conduction terminal of the second power device are coupled to a first amplifier output. A second conduction terminal of the third power device and a first conduction terminal of the fourth power device are coupled to a second amplifier output. Left and right driver devices respectively disposed adjacent to left and right sides of the first power device have outputs respectively coupled to left and right control terminals respectively disposed on the left and right sides of the first power device.
    Type: Application
    Filed: September 14, 2021
    Publication date: March 16, 2023
    Inventors: Sam Seiichiro OCHI, Dumitru Gheorge SDRULLA, W. Albert GU, Tetsuya TAKATA, Itsuo YUZURIHARA, Tomohiro YONEYAMA, Yu HOSOYAMADA
  • Publication number: 20230084411
    Abstract: A semiconductor device comprises a semiconductor die having a first region and a second region, wherein an operating temperature of the second region is lower than an operating temperature of the first region. A plurality of first tubs are respectively disposed in the first region, the second region, or both. The semiconductor device further comprises a power device comprising a plurality of power device cells, and a diode having a plurality of diode cells. The power devices cells are disposed within tubs or portions of tubs that are in the first region, and the diode cells are disposed within tubs or portions of tubs that are in the second region. The power device may comprise a vertical metal oxide semiconductor field effect transistor (MOSFET), and the diode may comprise a vertical Schottky barrier diode (SBD).
    Type: Application
    Filed: September 14, 2021
    Publication date: March 16, 2023
    Inventors: Amaury GENDRON-HANSEN, Dumitru Gheorge SDRULLA, Leslie Louis SZEPESI, Tetsuya TAKATA, ltsuo YUZURIHARA, Tomohiro YONEYAMA, Yu HOSOYAMADA
  • Patent number: 11362649
    Abstract: A control signal may be produced in response to an assertion of a switch signal by asserting the control signal, waiting an adaptive delay after the assertion of the switch signal, de-asserting the control signal in response to the expiration of the adaptive delay, and re-asserting the control signal in response to a current generated according to the control signal becoming zero. The adaptive delay may be adjusted according to a voltage generated using the current. A circuit may include an XOR gate producing the control signal from a switch signal and an output of a Set-Reset Flip-Flop (SRFF), a zero-detect circuit that resets the SRFF when a current generated using the control circuit becomes zero, and a delay circuit to set the SRFF an adaptive delay after assertion of the switch signal and to adjust the adaptive delay according to a voltage generated by the current.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: June 14, 2022
    Assignees: Analog Power Conversion LLC, Kyosan Electric Manufacturing Co., Ltd.
    Inventors: Sam Seiichiro Ochi, Tetsuya Takata, Itsuo Yuzurihara, Tomohiro Yoneyama, Yu Hosoyamada
  • Patent number: 11180169
    Abstract: An information transmission system includes a ground system provided to a track and an onboard system installed in a train. The ground system includes two (M=2) track antennae selected from N types of track antennae with different resonance frequencies. The two track antennae are arranged side by side in a left and right direction relative to a traveling direction of the train. When the train passes through a position where the ground system is provided, the onboard system detects the two track antennae at once and can determine the resonance frequencies of the track antennae.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: November 23, 2021
    Assignees: KYOSAN ELECTRIC MFG. CO., LTD., Social System Development Laboratory Co., Ltd.
    Inventors: Akira Asano, Yuichirou Shimizu, Tomonori Itagaki, Tetsuya Takata, Hideo Nakamura
  • Publication number: 20190023292
    Abstract: An information transmission system includes a ground system provided to a track and an onboard system installed in a train. The ground system includes two (M=2) track antennae selected from N types of track antennae with different resonance frequencies. The two track antennae are arranged side by side in a left and right direction relative to a traveling direction of the train. When the train passes through a position where the ground system is provided, the onboard system detects the two track antennae at once and can determine the resonance frequencies of the track antennae.
    Type: Application
    Filed: July 13, 2018
    Publication date: January 24, 2019
    Inventors: Akira ASANO, Yuichirou SHIMIZU, Tomonori ITAGAKI, Tetsuya TAKATA, Hideo NAKAMURA
  • Patent number: 5496228
    Abstract: An evaporated fuel control system for use with an internal combustion engine having a cylinder, a fuel supply system for supplying fuel into the cylinder, and a torque down control device for executing torque down control at a predetermined condition, the evaporated fuel control system includes: an evaporated fuel supply system for trapping fuel evaporated from the fuel supply system and supplying the evaporated fuel into the cylinder, and an evaporated fuel supply controller for controlling the supply of evaporated fuel into the cylinder in accordance with the execution of torque down control.
    Type: Grant
    Filed: January 25, 1994
    Date of Patent: March 5, 1996
    Assignee: Mazda Motor Corporation
    Inventors: Tetsuya Takata, Kazuo Niide
  • Patent number: 5291965
    Abstract: An engine output control system for a vehicle detects a degree of slip of driving wheels of the vehicle and determines engine output reduction requirement by which the output of the engine is to be reduced in order to converge the degree of the slip of the driving wheels on a target value according to the degree of slip detected. The output of the engine is reduced by the engine output reduction requirement when the engine speed is not lower than a preset engine speed and reduction of the engine output is inhibited when the engine speed is lower than the preset engine speed. The preset engine speed is changed according to the engine output reduction requirement so that the preset engine speed is higher when the engine output reduction requirement is large than when it is small.
    Type: Grant
    Filed: September 26, 1991
    Date of Patent: March 8, 1994
    Assignee: Mazda Motor Corporation
    Inventor: Tetsuya Takata
  • Patent number: 4980834
    Abstract: An air-to-fuel ratio control system executes a feedback control of air-to-fuel ratio based on an output of an oxygen sensor. The oxygen sensor is judged to be active when a change of the output therefrom occurs to make a fuel mixture rich. For detecting the failure or breakdown of the oxygen sensor when the feedback air-to-fuel control is suspended, the air-to-fuel ratio control system comprises an activity sensor for detecting whether the oxygen sensor is active or inactive, an air-to-fuel ratio altering device for enforcing an alteration of air-to-fuel ratio to make a fuel mixture rich, and a judging device for judging the oxygen sensor to be broken down when no activity detection is made while the alteration of air-to-fuel ratio has been effected.
    Type: Grant
    Filed: June 30, 1988
    Date of Patent: December 25, 1990
    Assignee: Mazda Motor Corporation
    Inventors: Tatsuji Ikeda, Tetsushi Hosokai, Masaki Fujii, Tetsuya Takata