Patents by Inventor Tetsuya Tatsumi

Tetsuya Tatsumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10403516
    Abstract: Etching characteristics in a case where a workpiece contains a nitrogen compound and an etching gas such as a CHxFy-based gas contains hydrogen are obtained. In a flux calculation step, an information processing apparatus calculates a plurality of fluxes in a surface reaction model, a processed surface of a workpiece including a protection film layer and a reaction layer in the surface reaction model. In a protection film layer calculation step, the information processing apparatus calculates a thickness of the protection film layer by using a calculation equation for calculating a thickness of an etched protection film layer based on the basis of a removal term for describing removal of the protection film layer, the removal term being selected depending on a comparison result of comparing the plurality of fluxes.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: September 3, 2019
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Nobuyuki Kuboi, Tetsuya Tatsumi
  • Publication number: 20170207107
    Abstract: Etching characteristics in the case where a workpiece contains a nitrogen compound and an etching gas such as a CHxFy-based gas contains hydrogen are obtained. In a flux calculation step, an information processing apparatus calculates a plurality of fluxes in a surface reaction model, a processed surface of a workpiece including a protection film layer and a reaction layer in the surface reaction model. In a protection film layer calculation step, the information processing apparatus calculates a thickness of the protection film layer by using a calculation equation for calculating a thickness of the etched protection film layer on the basis of a removal term for describing removal of the protection film layer, the removal term being selected depending on a result of comparing the plurality of fluxes.
    Type: Application
    Filed: June 15, 2015
    Publication date: July 20, 2017
    Inventors: Nobuyuki KUBOI, Tetsuya TATSUMI
  • Patent number: 9411914
    Abstract: Disclosed herein is a simulator including: an input section adapted to acquire processing conditions for a given process performed on a workpiece; and a damage calculation section adapted to acquire the damage of the workpiece, based on the processing conditions, by calculating, using a Flux method, the relationship between the amount of a first substance externally injected onto a given evaluation point on the workpiece during the given process and the amount of a second substance released from the given evaluation point on the workpiece as a result of the injection of the first substance.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: August 9, 2016
    Assignee: Sony Corporation
    Inventors: Nobuyuki Kuboi, Tetsuya Tatsumi
  • Patent number: 9287097
    Abstract: The simulation method is for predicting a damage amount due to ultraviolet rays in manufacturing a semiconductor device.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: March 15, 2016
    Assignee: SONY CORPORATION
    Inventors: Nobuyuki Kuboi, Tetsuya Tatsumi, Masanaga Fukasawa
  • Patent number: 8747685
    Abstract: Disclosed herein is a shape simulation apparatus including: a flux computation block configured to compute the flux of particles incident on the surface of a wafer covered with a mask; and a shape computation block configured to compute a surface shape of the wafer by allowing the coordinates of a plurality of calculation points established on the surface of the wafer to be time-evolved based on the incident flux computed.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: June 10, 2014
    Assignee: Sony Corporation
    Inventors: Nobuyuki Kuboi, Takashi Kinoshita, Tetsuya Tatsumi
  • Patent number: 8685856
    Abstract: A fabrication method of an anti-reflection structure includes the steps of: forming a resin film having micro-particles dispersed therein on a surface of a substrate; forming a protrusion dummy pattern on the resin film by etching the resin film using the micro-particles in the resin film as a mask while gradually etching the micro-particles; and forming a protrusion pattern on the surface of the substrate by etching back the surface of the substrate together with the resin film having the protrusion dummy pattern formed thereon, and transferring a surface shape of the protrusion dummy pattern formed on a surface of the resin film to the surface of the substrate.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: April 1, 2014
    Assignee: Sony Corporation
    Inventors: Kensaku Maeda, Kaoru Koike, Tohru Sasaki, Tetsuya Tatsumi
  • Patent number: 8649893
    Abstract: Disclosed herein is a semiconductor manufacturing device including, a chamber, a sensor, a sticking probability calculating section, an acting section, and a control section.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: February 11, 2014
    Assignee: Sony Corporation
    Inventors: Nobuyuki Kuboi, Tetsuya Tatsumi
  • Publication number: 20130337584
    Abstract: Disclosed herein is a shape simulation apparatus including: a flux computation block configured to compute the flux of particles incident on the surface of a wafer covered with a mask; and a shape computation block configured to compute a surface shape of the wafer by allowing the coordinates of a plurality of calculation points established on the surface of the wafer to be time-evolved based on the incident flux computed.
    Type: Application
    Filed: August 21, 2013
    Publication date: December 19, 2013
    Applicant: Sony Corporation
    Inventors: Nobuyuki KUBOI, Takashi KINOSHITA, Tetsuya TATSUMI
  • Patent number: 8535550
    Abstract: Disclosed herein is a shape simulation apparatus including: a flux computation block configured to compute the flux of particles incident on the surface of a wafer covered with a mask; and a shape computation block configured to compute a surface shape of the wafer by allowing the coordinates of a plurality of calculation points established on the surface of the wafer to be time-evolved based on the incident flux computed.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: September 17, 2013
    Assignee: Sony Corporation
    Inventors: Nobuyuki Kuboi, Takashi Kinoshita, Tetsuya Tatsumi
  • Publication number: 20120158379
    Abstract: Disclosed herein is a simulator including: an input section adapted to acquire processing conditions for a given process performed on a workpiece; and a damage calculation section adapted to acquire the damage of the workpiece, based on the processing conditions, by calculating, using a Flux method, the relationship between the amount of a first substance externally injected onto a given evaluation point on the workpiece during the given process and the amount of a second substance released from the given evaluation point on the workpiece as a result of the injection of the first substance.
    Type: Application
    Filed: December 12, 2011
    Publication date: June 21, 2012
    Applicant: Sony Corporation
    Inventors: Nobuyuki Kuboi, Tetsuya Tatsumi
  • Publication number: 20110160889
    Abstract: Disclosed herein is a semiconductor manufacturing device including, a chamber, a sensor, a sticking probability calculating section, an acting section, and a control section.
    Type: Application
    Filed: December 8, 2010
    Publication date: June 30, 2011
    Applicant: SONY CORPORATION
    Inventors: Nobuyuki Kuboi, Tetsuya Tatsumi
  • Publication number: 20110082577
    Abstract: Disclosed herein is a shape simulation apparatus including: a flux computation block configured to compute the flux of particles incident on the surface of a wafer covered with a mask; and a shape computation block configured to compute a surface shape of the wafer by allowing the coordinates of a plurality of calculation points established on the surface of the wafer to be time-evolved based on the incident flux computed.
    Type: Application
    Filed: August 17, 2010
    Publication date: April 7, 2011
    Applicant: SONY CORPORATION
    Inventors: Nobuyuki Kuboi, Takashi Kinoshita, Tetsuya Tatsumi
  • Patent number: 7808026
    Abstract: Provision of a process capable of preferably etching particularly PtMn used for a pin layer of an MRAM is an object: a dry etching method for performing dry etching on a layer including platinum and/or manganese by using pulse plasma and a production method of an MRAM, wherein the dry etching method is applied to processing of the pin layer. The MRAM is configured to have a memory portion comprising a magnetic memory element composed of tunnel magnetoresistive effect element formed by stacking a magnetic fixed layer having a fixed magnetization direction, a tunnel barrier layer and a magnetic layer capable of changing the magnetization direction.
    Type: Grant
    Filed: May 27, 2008
    Date of Patent: October 5, 2010
    Assignees: Sony Corporation
    Inventors: Toshiaki Shiraiwa, Tetsuya Tatsumi, Seiji Samukawa
  • Publication number: 20100244169
    Abstract: A fabrication method of an anti-reflection structure includes the steps of: forming a resin film having micro-particles dispersed therein on a surface of a substrate; forming a protrusion dummy pattern on the resin film by etching the resin film using the micro-particles in the resin film as a mask while gradually etching the micro-particles; and forming a protrusion pattern on the surface of the substrate by etching back the surface of the substrate together with the resin film having the protrusion dummy pattern formed thereon, and transferring a surface shape of the protrusion dummy pattern formed on a surface of the resin film to the surface of the substrate.
    Type: Application
    Filed: March 22, 2010
    Publication date: September 30, 2010
    Applicant: SONY CORPORATION
    Inventors: Kensaku Maeda, Kaoru Koike, Tohru Sasaki, Tetsuya Tatsumi
  • Publication number: 20090162950
    Abstract: A dry etching equipment includes a topography simulator and a control section. The topography simulator controls an amount of deposition species incident upon a sidewall to be processed in accordance with a wafer opening ratio and a solid angle of a local pattern, the deposition amount being represented by a product of a reaction product flux and the solid angle. The control section compares a database obtained by the topography simulator with an actual measured value detected from an etching condition during dry etching to calculate a correction value for etching process, and indicates the correction value to an etching chamber in the dry etching equipment. The dry etching equipment corrects in real time a parameter for the etching process conducted in the etching chamber.
    Type: Application
    Filed: December 10, 2008
    Publication date: June 25, 2009
    Applicant: Sony Corporation
    Inventors: Nobuyuki Kuboi, Tetsuya Tatsumi
  • Patent number: 7473646
    Abstract: Provision of a process capable of preferably etching particularly PtMn used for a pin layer of an MRAM is an object: a dry etching method for performing dry etching on a layer including platinum and/or manganese by using pulse plasma and a production method of an MRAM, wherein the dry etching method is applied to processing of the pin layer. The MRAM is configured to have a memory portion comprising a magnetic memory element composed of tunnel magnetoresistive effect element formed by stacking a magnetic fixed layer having a fixed magnetization direction, a tunnel barrier layer and a magnetic layer capable of changing the magnetization direction.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: January 6, 2009
    Assignees: Sony Corporation
    Inventors: Toshiaki Shiraiwa, Tetsuya Tatsumi, Seiji Samukawa
  • Publication number: 20080286883
    Abstract: Provision of a process capable of preferably etching particularly PtMn used for a pin layer of an MRAM is an object: a dry etching method for performing dry etching on a layer including platinum and/or manganese by using pulse plasma and a production method of an MRAM, wherein the dry etching method is applied to processing of the pin layer. The MRAM is configured to have a memory portion comprising a magnetic memory element composed of tunnel magnetoresistive effect element formed by stacking a magnetic fixed layer having a fixed magnetization direction, a tunnel barrier layer and a magnetic layer capable of changing the magnetization direction.
    Type: Application
    Filed: May 27, 2008
    Publication date: November 20, 2008
    Applicants: Sony Corporation, Seiji Samukawa
    Inventors: Toshiaki Shiraiwa, Tetsuya Tatsumi, Seiji Samukawa
  • Patent number: 7439068
    Abstract: Disclosed is a plasma monitoring method for detecting the amount of atomic radicals generated by dissociation of a molecular raw material gas during a plasma processing conducted by introducing the molecular raw material gas and a rare gas into a process atmosphere, wherein the amount of the atomic radicals is predicted from the dissociation degree of the molecular raw material gas determined from the partial pressure of the molecular raw material gas in the process atmosphere, the luminous intensity of the rare gas, and the partial pressure of the rare gas in the process atmosphere, whereby the amount of the specific atomic radicals can be monitored easily and accurately.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: October 21, 2008
    Assignee: Sony Corporation
    Inventor: Tetsuya Tatsumi
  • Publication number: 20070298615
    Abstract: A pattern forming method is provided. The pattern forming method includes a first step of forming a resist pattern including a lactone group-containing skeleton above an etched layer provided on a substrate; a second step of performing plasma processing using a hydrogen-containing gas to lower a glass transition temperature or a softening point of the resist pattern; and a third step of transferring the resist pattern after the plasma processing to the etched layer by etching, and forming the pattern of the etched layer.
    Type: Application
    Filed: January 30, 2007
    Publication date: December 27, 2007
    Inventors: Nobuyuki Matsuzawa, Atsuhiro Ando, Eriko Matsui, Yuko Yamaguchi, Katsuhisa Kugimiya, Tetsuya Tatsumi, Salam Kazi, Takeshi Iwai, Makiko Irie
  • Publication number: 20070026681
    Abstract: Provision of a process capable of preferably etching particularly PtMn used for a pin layer of an MRAM is an object: a dry etching method for performing dry etching on a layer including platinum and/or manganese by using pulse plasma and a production method of an MRAM, wherein the dry etching method is applied to processing of the pin layer. The MRAM is configured to have a memory portion comprising a magnetic memory element composed of tunnel magnetoresistive effect element formed by stacking a magnetic fixed layer having a fixed magnetization direction, a tunnel barrier layer and a magnetic layer capable of changing the magnetization direction.
    Type: Application
    Filed: August 26, 2004
    Publication date: February 1, 2007
    Applicant: SONY CORPORATION
    Inventors: Toshiaki Shiraiwa, Tetsuya Tatsumi, Seiji Samukawa