Patents by Inventor Tetsuya Tokunaga
Tetsuya Tokunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6712111Abstract: A carrier tool having a protective ring with a sheet extended over an underside of the ring is used, a semiconductor wafer is made to adhere to the sheet, the semiconductor wafer, being surrounded by the protective ring, is carried from a container device to a bonding stage. Bonding is performed on the bonding stage, and the wafer is carried out to another container device, consequently damage of the wafer is avoided.Type: GrantFiled: March 11, 2002Date of Patent: March 30, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tetsuya Tokunaga, Takahiro Yonezawa, Hiroyuki Kiyomura, Tatsuo Sasaoka
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Patent number: 6680221Abstract: A bare chip mounting method includes: a dicing step for dividing a semiconductor wafer into individual IC chips while the semiconductor wafer is being attached to a carrier; a washing step for washing the diced semiconductor wafer; a bump-bonding for carrying the washed semiconductor wafer to an assembly process while the semiconductor wafer is being attached to the carrier so as to form a bump on an electrode pad of the wafer; and a mounting step for mounting each of the IC chips, on which the bump is formed, onto a circuit formation body.Type: GrantFiled: October 10, 2002Date of Patent: January 20, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tetsuya Tokunaga, Takahiro Yonezawa, Hiroyuki Kiyomura, Tatsuo Sasaoka, Satoshi Horie
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Patent number: 6653999Abstract: A liquid crystal driving integrated circuit capable of adjusting display contrast and requiring no externally attached components. A resistor formed by four serially connected resistor elements R1 has one end connected to a reference voltage VLCD0 applied from an operational amplifier 8, and the other end connected to an external variable resistor 25 through a terminal 24. Consequently, liquid crystal driving voltages VLCD0, VLCD1, VLCD2, VLCD3, and VLCD4 can be finely adjusted not only by eleven versions of reference voltage VLCD0 in accordance with voltages at respective connection points of twelve serially connected resistor elements, but by changing the resistance of the external variable resistor 25, to thereby provide a liquid crystal driving integrated circuit 1 that can be used for a variety of general purposes. Since only one external variable resistor 25 is required and this resistor is inherently variable, there is no need to consider variation in characteristics.Type: GrantFiled: December 10, 1999Date of Patent: November 25, 2003Assignee: Sanyo Electric Co., Ltd.Inventors: Shuji Motegi, Hiroyuki Arai, Tetsuya Tokunaga
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Patent number: 6633271Abstract: A liquid crystal driving integrated circuit capable of adjusting display contrast and requiring no externally attached components. Transmission gates TG0-TG10 are provided at respective connection points of twelve resistor elements connected in series between a power supply and the ground. One of the voltages V0-V10 derived from the transmission gates TG0-TG10 in accordance with control signals CA0-CA10 is applied to an operational amplifier 8, and used as a reference voltage VLCD0. The control signals CA0-CA10 are obtained by decoding control data D0-D3 supplied from an external source by a decoder 19. Therefore, the reference voltage VLCD0 can be set in a plurality of stages simply by changing control data D0-D3 to a user specified value. As the twelve resistor elements connected in series are formed on the same semiconductor substrate, display contrast can be adjusted without requiring any external components attached to a liquid crystal driving integrated circuit 1.Type: GrantFiled: December 7, 1999Date of Patent: October 14, 2003Assignee: Sanyo Electric Co., Ltd.Inventors: Shuji Motegi, Hiroyuki Arai, Tetsuya Tokunaga
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Publication number: 20030096451Abstract: A bare chip mounting method includes: a dicing step for dividing a semiconductor wafer into individual IC chips while the semiconductor wafer is being attached to a carrier; a washing step for washing the diced semiconductor wafer; a bump-bonding for carrying the washed semiconductor wafer to an assembly process while the semiconductor wafer is being attached to the carrier so as to form a bump on an electrode pad of the wafer; and a mounting step for mounting each of the IC chips, on which the bump is formed, onto a circuit formation body.Type: ApplicationFiled: October 10, 2002Publication date: May 22, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Tetsuya Tokunaga, Takahiro Yonezawa, Hiroyuki Kiyomura, Tatsuo Sasaoka, Satoshi Horie
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Publication number: 20030094481Abstract: In a bump bonding technique for forming a bump on an IC, including forming a ball at the tip of a gold wire protruding from a capillary, and providing a metal-to-metal joint by applying ultrasonic vibration from a ultrasonic head through the capillary while pressing the ball against a pad portion on the IC, the metal-to-metal joint is provided by applying the ultrasonic vibration at a frequency in a range of 130 to 320 kHz, more preferably in a range of 170 to 270 kHz, and most preferably at a frequency of 230±10 kHz at room temperatures and atmospheric pressure. Consequently, a bump is formed on an IC having a low heat resistance temperature in a satisfactory joint condition, and a bump is formed with good positional accuracy without giving the influence of heat to the surroundings.Type: ApplicationFiled: November 15, 2002Publication date: May 22, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Satoshi Horie, Takahiro Yonezawa, Hiroyuki Kiyomura, Tetsuya Tokunaga, Tatsuo Sasaoka
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Publication number: 20030011558Abstract: A liquid crystal driving integrated circuit capable of adjusting display contrast and requiring no externally attached components. A resistor formed by four serially connected resistor elements R1 has one end connected to a reference voltage VLCD0 applied from an operational amplifier 8, and the other end connected to an external variable resistor 25 through a terminal 24. Consequently, liquid crystal driving voltages VLCD0, VLCD1, VLCD2, VLCD3, and VLCD4 can be finely adjusted not only by eleven versions of reference voltage VLCD0 in accordance with voltages at respective connection points of twelve serially connected resistor elements, but by changing the resistance of the external variable resistor 25, to thereby provide a liquid crystal driving integrated circuit 1 that can be used for a variety of general purposes. Since only one external variable resistor 25 is required and this resistor is inherently variable, there is no need to consider variation in characteristics.Type: ApplicationFiled: December 10, 1999Publication date: January 16, 2003Inventors: SHUJI MOTEGI, HIROYUKI ARAI, TETSUYA TOKUNAGA
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Patent number: 6474538Abstract: A higher speed moving device moves a capillary at high speed. A low inertial moving and pressing device moves and presses the capillary with low inertia. The high speed motion, and the moving and pressing motion with the low inertia are carried out independently of each other. Thus, an inertia at the low inertial moving and pressing device is reduced, whereby an impact force when a melt ball is driven by the low inertial moving and pressing device into contact with an electrode of a semiconductor integrated circuit is restricted, thus enabling stable formation for minute bumps. On the other hand, operations other than pressing the melt ball to the electrode and joining the melt ball are conducted by driving the capillary by the higher speed moving device, so that productivity is improved.Type: GrantFiled: October 19, 2000Date of Patent: November 5, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takahiro Yonezawa, Akihiro Yamamoto, Hiroyuki Kiyomura, Tetsuya Tokunaga, Tatsuo Sasaoka, Masahiko Hashimoto
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Publication number: 20020125303Abstract: A carrier tool having a protective ring with a sheet extended over an underside of the ring is used, a semiconductor wafer is made to adhere to the sheet, the semiconductor wafer, being surrounded by the protective ring, is carried from a container device to a bonding stage. Bonding is performed on the bonding stage, and the wafer is carried out to another container device, consequently damage of the wafer is avoided.Type: ApplicationFiled: March 11, 2002Publication date: September 12, 2002Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Tetsuya Tokunaga, Takahiro Yonezawa, Hiroyuki Kiyomura, Tatsuo Sasaoka
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Patent number: 6246388Abstract: For changing the content of a display RAM (38) or an accessory RAM (39), various data SDI, such as an instruction code, address data, display data, is initially transferred to a shift register (11). Then, the display data in the shift register (11) is latched by a latch circuit (62). A write operation is carried out during a period from the completion of a shift operation by the shift register (11) using various data SDI in connection with the current display to the completion of a shift operation using various data SDI in connection with the next display, i.e., a period with an operation enable signal CE remaining at an L or H level. As a result, time allowance for writing is ensured, which contributes to reduction of software processing load by an external device.Type: GrantFiled: May 10, 1999Date of Patent: June 12, 2001Assignee: Sanyo Electric Co., Ltd.Inventors: Syuji Motegi, Hiroyuki Arai, Tetsuya Tokunaga
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Patent number: 5938746Abstract: A master (1) and a slave (3) are connected via a transmission line (5) for sending a clock CL; another transmission line (6) for bidirectionally sending data DT; and still another transmission line (7) for sending a control signal CE. Having turned a control signal CE into "L," the master (1) transmits an address code as data DT to the slave (3). Referring to the content of the transmitted address code, the slave (3) detects whether it is a data transmission from the master (1) to the slave (3) or vice versa. While a control signal CE remains "H," data transmission takes place. Data output from the slave (3) to the data line (6) is managed by a bus driver (22). The bus driver (22) is turned off during a period from when the clock CL became "H" to when a control signal CE becomes "L" after data transmission so that data transmission from the master (1) will not be adversely affected.Type: GrantFiled: February 25, 1997Date of Patent: August 17, 1999Assignee: Sanyo Electric Co., Ltd.Inventors: Toshiyuki Ozawa, Shuji Motegi, Tetsuya Tokunaga
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Patent number: 4225297Abstract: A nozzle pre-heating device is provided for use in a tower for prilling molten substances. The device comprises a pre-heating chamber which is open only at the upper portion thereof for pre-heating a prilling nozzle and is closed at the bottom to shield the nozzle from the cooling effects of upper flowing gas in the prilling tower. The device is provided with means for moving either the nozzle or the pre-heating device from proximity to one another when the pre-heating device is not in use, thereby permitting free flow of the molten substance from the nozzle during normal operation of the prilling tower.Type: GrantFiled: November 14, 1978Date of Patent: September 30, 1980Assignee: Sumitomo Durez Company, Ltd.Inventors: Shoji Tomita, Tetsuya Tokunaga
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Patent number: 4220441Abstract: An improved prilling tower is provided for the prilling of molten substances wherein a receiver equipped with an exhaust conduit is positioned below the nozzle during pre-heating of the nozzle prior to normal operation, after the end of a normal operating cycle or when the nozzle is replaced during operation of the prilling tower. Means are provided for moving either the receiver or the nozzle in a horizontal direction so that the nozzle is out of proximity with the receiver during normal operation of the prilling tower. More than one nozzle or more than one receiver can be employed in a prilling tower to provide for continuous operation of the prilling tower during replacement or cleaning of the nozzles.Type: GrantFiled: November 14, 1978Date of Patent: September 2, 1980Assignee: Sumitomo Durez Company, Ltd.Inventors: Shoji Tomita, Tetsuya Tokunaga
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Patent number: 4072531Abstract: Plugging compositions for blast furnace tap holes comprising a refractory filler, a wetting agent, and a binder therefor comprising a phenol-aldehyde condensate resin chemically modified by reaction with lignin have a muddy consistancy, and are characterized by enhanced compressive strength at elevated temperatures and increased plasticity at low temperatures as compared to conventional binders.Type: GrantFiled: March 12, 1976Date of Patent: February 7, 1978Assignee: Sumitomo Durez Company, Ltd.Inventors: Kyohei Funabiki, Tetsuya Tokunaga
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Patent number: 4058403Abstract: Solid refractory compositions comprising an inorganic particulate refractory material and a carbonaceous binder therefor comprising a substantially carbonized phenol-aldehyde condensate resin chemically modified by reaction with lignin and/or molasses. The refractory compositions of the invention are characterized by an enhanced bending strength even at extreme temperatures and a desirable diminished porosity compared to comparable refractory compositions having carbonaceous binders derived from conventional phenol-aldehyde resins.Type: GrantFiled: December 11, 1975Date of Patent: November 15, 1977Assignee: Hooker Chemicals & Plastics CorporationInventors: Kyohei Funabiki, Tetsuya Tokunaga