Patents by Inventor Tetsuyoshi Shiota
Tetsuyoshi Shiota has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11836580Abstract: A machine learning method includes acquiring data including attendance records of employees and information indicating which employee has taken a leave of absence from work, in response to determining that a first employee of the employees has not taken a leave of absence in accordance with the data, generating a first tensor on a basis of an attendance record of the first employee and parameters associated with elements included in the attendance record, in response to determining that a second employee of the employees has taken a leave of absence in accordance with the data, modifying the parameters, and generating a second tensor on a basis of an attendance record of the second employee and the modified parameters, and generating a model by machine learning based on the first tensor and the second tensor.Type: GrantFiled: November 27, 2019Date of Patent: December 5, 2023Assignee: FUJITSU LIMITEDInventors: Satoko Iwakura, Shunichi Watanabe, Tetsuyoshi Shiota, Izumi Nitta, Daisuke Fukuda, Masaru Todoriki
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Patent number: 11829867Abstract: A learning device receives, for each target, learning data that represents the source of generation of a tensor including a plurality of elements which multi-dimensionally represent the features of the target over a period of time set in advance. When the target satisfies a condition set in advance, the learning device identifies the period of time corresponding to the condition in the learning data. Subsequently, the learning device generates a weighted tensor corresponding to the learning data that is at least either before or after the concerned period of time.Type: GrantFiled: May 24, 2019Date of Patent: November 28, 2023Assignee: FUJITSU LIMITEDInventors: Satoko Iwakura, Shunichi Watanabe, Tetsuyoshi Shiota, Izumi Nitta, Daisuke Fukuda
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Publication number: 20200302240Abstract: A machine learning device includes: a model generator configured to generate a machine learning model by using first training data that includes image data, the image data including a target to be recognized and a label indicating the target to be recognized; a teaching data generator configured to generate second training data indicating a changed variation in characteristics related to the target to be recognized, based on recognition degrees at which the target to be recognized is recognized from verification data items when the image data is input as the verification data items to the generated machine learning model; and a learning executor configured to execute machine learning by inputting the generated second training data to the generated machine learning, model.Type: ApplicationFiled: March 13, 2020Publication date: September 24, 2020Applicant: FUJITSU LIMITEDInventors: Miho Murata, Hironobu Kitajima, Tetsuyoshi Shiota
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Publication number: 20200265044Abstract: A path searching method to be executed by a computer, the path search method includes identifying a starting point and an end point from nodes included in graph data; identifying, by using a limit value for which a value lower than a predetermined number is set, a joint point where a path from the starting point and a path from the end point are jointed; limiting a number of paths to be held in association with each of nodes including the joint point to a number equal to or lower than the limit value and holding a path having a short distance among paths reaching each of the nodes; searching, by using the paths held in association with the nodes, paths whose number is equal to or lower than a higher predetermined number among the paths reaching the joint point; and outputting the paths that have been searched.Type: ApplicationFiled: February 13, 2020Publication date: August 20, 2020Applicant: FUJITSU LIMITEDInventors: Yasuo Yamane, Tetsuyoshi Shiota
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Patent number: 10692008Abstract: An information presentation device includes a processor that executes a procedure. The procedure includes: for respective decision making entities, calculating assessment indexes of a plurality of respective assessment criteria, based on characteristic information representing a characteristic of each of the decision making entities; selecting, from the plurality of decision making entities, at least one decision making entity having a characteristic similar to that of an information presentation target decision making entity that is a target of information presentation, based on an assessment index calculated for each of the decision making entities; and acquiring and presenting information related to decision making by the selected decision making entity from a storage section storing information related to decision making for each of the plurality of decision making entities.Type: GrantFiled: April 25, 2016Date of Patent: June 23, 2020Assignee: FUJITSU LIMITEDInventors: Katsuhito Nakazawa, Tetsuyoshi Shiota, Hiroshi Chiba, Tomoko Nagano, Hidemichi Fujii
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Publication number: 20200193327Abstract: A machine learning method includes acquiring data including attendance records of employees and information indicating which employee has taken a leave of absence from work, in response to determining that a first employee of the employees has not taken a leave of absence in accordance with the data, generating a first tensor on a basis of an attendance record of the first employee and parameters associated with elements included in the attendance record, in response to determining that a second employee of the employees has taken a leave of absence in accordance with the data, modifying the parameters, and generating a second tensor on a basis of an attendance record of the second employee and the modified parameters, and generating a model by machine learning based on the first tensor and the second tensor.Type: ApplicationFiled: November 27, 2019Publication date: June 18, 2020Applicant: FUJITSU LIMITEDInventors: Satoko Iwakura, Shunichi WATANABE, Tetsuyoshi Shiota, Izumi NITTA, Daisuke Fukuda, Masaru TODORIKI
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Publication number: 20200111035Abstract: An information processing method includes calculating, for each reference target among reference targets to which a measure has been applied, a difference between a value of an index of the reference target linked to predetermined variables, and a value of the index of the reference target obtained under a virtual scenario in which the measure is not applied to the reference target, as a first index value difference, calculating a relation expression that links the first index value difference to the predetermined variables, and calculating, by using the predetermined variables of a target and the relation expression, a difference between a value of the index of the target obtained under a virtual scenario in which the measure is applied to the target and a value of the index of the target obtained when the measure is not applied to the target, as a second index value difference.Type: ApplicationFiled: December 5, 2019Publication date: April 9, 2020Applicant: FUJITSU LIMITEDInventors: Katsuhito Nakazawa, Tetsuyoshi Shiota, Takahiro HOSHINO, Yuki SAITO, Takayuki TODA, Yuya MATSUMURA
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Publication number: 20200034708Abstract: Chronological data having a first cycle including a set of unit times of a predetermined number is provided. Image data including a figure is generated based on the chronological data. The figure is generated such that respective sets of unit times included in the chronological data are arranged in a spiral in chronological order and unit times corresponding to a same position within the first cycle are radially aligned from the center of the spiral.Type: ApplicationFiled: July 10, 2019Publication date: January 30, 2020Applicant: FUJITSU LIMITEDInventor: Tetsuyoshi SHIOTA
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Publication number: 20190378011Abstract: A learning device receives, for each target, learning data that represents the source of generation of a tensor including a plurality of elements which multi-dimensionally represent the features of the target over a period of time set in advance. When the target satisfies a condition set in advance, the learning device identifies the period of time corresponding to the condition in the learning data. Subsequently, the learning device generates a weighted tensor corresponding to the learning data that is at least either before or after the concerned period of time.Type: ApplicationFiled: May 24, 2019Publication date: December 12, 2019Applicant: FUJITSU LIMITEDInventors: Satoko IWAKURA, Shunichi WATANABE, Tetsuyoshi SHIOTA, Izumi NITTA, Daisuke FUKUDA
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Publication number: 20190188532Abstract: An information presentation method causes a computer to perform, among a plurality of evaluation items for each of a plurality of decision making entities, extracting one or a plurality of evaluation items that indicate features of a target decision making entity being a target specified by a user for information presentation, for each of the other decision making entities other than the target decision making entity included in the plurality of decision making entities, calculating a feature similarity degree corresponding to the extracted evaluation items and becoming higher with an increase in a degree indicating a feature of the target decision making entity and each of the other decision making entities based on the evaluation value of the evaluation item; and outputting information on the other decision making entity having the calculated feature similarity degree equal to or higher than a predetermined value to an output device.Type: ApplicationFiled: February 26, 2019Publication date: June 20, 2019Applicant: FUJITSU LIMITEDInventor: Tetsuyoshi Shiota
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Publication number: 20190042678Abstract: A prediction apparatus includes one or more memories and one or more processors configured to select each of specific periods for each of a plurality of explanatory variables on the basis of a correlation between actual values of each of the plurality of explanatory variables aggregated for each period and actual values of an objective variable aggregated for each period, the plurality of explanatory variables relating to the objective variable, determine a plurality of regression coefficients of a regression equation relating to the objective variable on the basis of each specific actual value of the plurality of explanatory variables in each of the selected specific periods, perform calculation of a predicted value of the objective variable by using the regression equation having the determined plurality of regression coefficients, and output the calculated predicted value.Type: ApplicationFiled: July 24, 2018Publication date: February 7, 2019Applicant: FUJITSU LIMITEDInventors: Hitoshi Komoriya, Tetsuyoshi Shiota, Katsuhito Nakazawa
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Publication number: 20160239747Abstract: An information presentation device includes a processor that executes a procedure. The procedure includes: for respective decision making entities, calculating assessment indexes of a plurality of respective assessment criteria, based on characteristic information representing a characteristic of each of the decision making entities; selecting, from the plurality of decision making entities, at least one decision making entity having a characteristic similar to that of an information presentation target decision making entity that is a target of information presentation, based on an assessment index calculated for each of the decision making entities; and acquiring and presenting information related to decision making by the selected decision making entity from a storage section storing information related to decision making for each of the plurality of decision making entities.Type: ApplicationFiled: April 25, 2016Publication date: August 18, 2016Applicant: FUJITSU LIMITEDInventors: Katsuhito Nakazawa, Tetsuyoshi Shiota, Hiroshi Chiba, Nagano Tomoko, Hidemichi Fujii
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Patent number: 8717003Abstract: A voltage regulator circuit includes: a first pulse generator configured to output a pulse whose level remains unchanged when an input signal of a first circuit is in a first period, and whose level changes from a second level to a first level when an edge of the input signal of the first circuit is detected after the first period; a second pulse generator configured to output a pulse from a time that the pulse output by the first pulse generator becomes the first level until a second period elapses; a first field-effect transistor having a source connected to a power supply potential node, and a drain connected to a power supply potential terminal of the first circuit; and a first switch configured to cause a potential at a gate of the first field-effect transistor to be a first potential.Type: GrantFiled: July 9, 2010Date of Patent: May 6, 2014Assignee: Fujitsu LimitedInventors: Tetsutaro Hashimoto, Tetsuyoshi Shiota
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Patent number: 8704410Abstract: A semiconductor device includes: a first power line to supply a first voltage to a plurality of internal circuits; a second power line to supply the first voltage to the plurality of internal circuits; a first switch provided between said first power line and each of the plurality of internal circuits; a second switch provided between said second power line and each of the plurality of internal circuits; and a control circuit to control the first switch of a second internal circuit included in the plurality of the internal circuits based on the amounts of noise and voltage drop at power-on in a first circuit included in the plurality of internal circuits.Type: GrantFiled: December 8, 2010Date of Patent: April 22, 2014Assignee: Fujitsu LimitedInventors: Koichi Nakayama, Tetsuyoshi Shiota, Kenichi Kawasaki
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Patent number: 8207719Abstract: A series regulator circuit includes one or more transistors each having a channel with one end coupled to an input node to receive an input voltage and another end coupled to an output node, and having a control node to receive a control voltage, a control circuit configured to adjust the control voltage in response to a voltage of the output node such that the voltage of the output node is set equal to a voltage setting selected by an output voltage setting signal, and a switch circuit configured to change an operating condition, excluding the control voltage, of the one or more transistors in conjunction with a change in the voltage setting of the output node.Type: GrantFiled: May 18, 2009Date of Patent: June 26, 2012Assignee: Fujitsu LimitedInventor: Tetsuyoshi Shiota
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Publication number: 20110304380Abstract: A semiconductor device includes: a first power line to supply a first voltage to a plurality of internal circuits; a second power line to supply the first voltage to the plurality of internal circuits; a first switch provided between said first power line and each of the plurality of internal circuits; a second switch provided between said second power line and each of the plurality of internal circuits; and a control circuit to control the first switch of a second internal circuit included in the plurality of the internal circuits based on the amounts of noise and voltage drop at power-on in a first circuit included in the plurality of internal circuits.Type: ApplicationFiled: December 8, 2010Publication date: December 15, 2011Applicant: FUJITSU LIMITEDInventors: Koichi Nakayama, Tetsuyoshi Shiota, Kenichi Kawasaki
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Publication number: 20110006606Abstract: A voltage regulator circuit includes: a first pulse generator configured to output a pulse whose level remains unchanged when an input signal of a first circuit is in a first period, and whose level changes from a second level to a first level when an edge of the input signal of the first circuit is detected after the first period; a second pulse generator configured to output a pulse from a time that the pulse output by the first pulse generator becomes the first level until a second period elapses; a first field-effect transistor having a source connected to a power supply potential node, and a drain connected to a power supply potential terminal of the first circuit; and a first switch configured to cause a potential at a gate of the first field-effect transistor to be a first potential.Type: ApplicationFiled: July 9, 2010Publication date: January 13, 2011Applicant: FUJITSU LIMITEDInventors: Tetsutaro Hashimoto, Tetsuyoshi Shiota
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Patent number: 7774635Abstract: A multi-processing system includes: a selecting unit that selects a clock frequency for each processor chips based on lot-to-lot variation thereof; a calculating unit that calculates chip performance of the processor chips operating at the clock frequencies; a judging unit that judges whether a total of chip performance of the processor chips is equal to or higher than a predetermined system performance; and a setting unit that sets the clock frequencies to the processor chips when the total is equal to or higher than the predetermined system performance.Type: GrantFiled: May 31, 2006Date of Patent: August 10, 2010Assignee: Fujitsu LimitedInventor: Tetsuyoshi Shiota
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Patent number: 7696815Abstract: An electronic device includes: an integrated circuit having a first circuit part, a second circuit part, a first power source line of the first circuit part, a second power source line of the second circuit part, and a coupling switch coupling the first power source line and the second power source line; a power source supply part which generates a power source to be supplied to the first and second circuit parts and which has a power source supply control circuit controlling the supply of power source to the second circuit part; and a power source control part that controls the power source supply control circuit and the coupling switch, wherein the power source control part controls the power source supply control circuit so as to supply a power source in accordance with the operating state of the second circuit part and closes the coupling switch.Type: GrantFiled: November 19, 2008Date of Patent: April 13, 2010Assignee: Fujitsu LimitedInventor: Tetsuyoshi Shiota
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Publication number: 20090322297Abstract: A series regulator circuit includes one or more transistors each having a channel with one end coupled to an input node to receive an input voltage and another end coupled to an output node, and having a control node to receive a control voltage, a control circuit configured to adjust the control voltage in response to a voltage of the output node such that the voltage of the output node is set equal to a voltage setting selected by an output voltage setting signal, and a switch circuit configured to change an operating condition, excluding the control voltage, of the one or more transistors in conjunction with a change in the voltage setting of the output node.Type: ApplicationFiled: May 18, 2009Publication date: December 31, 2009Applicant: FUJITSU LIMITEDInventor: Tetsuyoshi SHIOTA