Patents by Inventor Tetsuyuki TSUCHIDA

Tetsuyuki TSUCHIDA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230422412
    Abstract: A multilayer wiring board includes two or more layers laminated together, each layer includes an insulating resin layer having a first surface and a second surface, and a conductor layer. The insulating resin layer includes a first recess that is open to the first surface, a groove section that is open to the first surface, and a second recess that is open to the second surface and communicates with one or more of the first recesses. Each insulating resin layer is integrally formed in a thickness direction thereof. The conductor layer includes a land portion and a wiring portion filling the first recess and the groove section, and a via portion protruding from the first surface at a position of the land portion. The via portion protruding from the first surface of the insulating resin layer fills a recess of another insulating resin layer adjacent to the first surface.
    Type: Application
    Filed: September 8, 2023
    Publication date: December 28, 2023
    Applicant: TOPPAN INC.
    Inventors: Akihiro HAYASHI, Masahito TANABE, Tetsuyuki TSUCHIDA
  • Patent number: 11756846
    Abstract: A glass core, a multilayer circuit board, and a method of manufacturing a glass core that appropriately form copper wiring, and suppresses crack and the like, a glass core includes: a glass plate; a first metal layer provided on the glass plate; a first electrolytic copper plating layer provided on the first metal layer; a dielectric layer provided above the first electrolytic copper plating layer; a second metal layer provided on the dielectric layer; an electroless nickel plating layer provided on the second metal layer and having a phosphorus content of less than 5 mass %; and a second electrolytic copper plating layer provided on the electroless nickel plating layer.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: September 12, 2023
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventor: Tetsuyuki Tsuchida
  • Publication number: 20230254983
    Abstract: A wiring board capable of suppressing migration between wires and to provide a method of producing the same, in a method of producing a wiring board provided with a first wiring board in which a first wiring layer is formed, and a second wiring board in which a second wiring layer finer than the first wiring layer is formed, the second wiring board is formed by performing steps of forming a first insulating resin layer provided with a wiring pattern and openings, forming a first inorganic insulating film on the first insulating resin layer, forming a first conductor layer corresponding to the wiring pattern and the openings on the inorganic insulating film, and forming a second inorganic insulating film on the first conductor layer.
    Type: Application
    Filed: April 14, 2023
    Publication date: August 10, 2023
    Applicant: TOPPAN INC.
    Inventors: Takeshi TAMURA, Tetsuyuki TSUCHIDA
  • Patent number: 11516907
    Abstract: A glass wiring board that can be kept from cracking by better preventing concentration of stresses in a glass plate on which a conductor layer including an electrolytic copper plating layer is provided, the wiring board includes: a glass plate; a first metal layer covering at least a part of the glass plate; and a second metal layer covering at least a part of the first metal layer, and the area of the first metal layer in contact with the second metal layer is smaller than the area of the second metal layer facing the first metal layer.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: November 29, 2022
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventor: Tetsuyuki Tsuchida
  • Publication number: 20210144847
    Abstract: A glass wiring board that can be kept from cracking by better preventing concentration of stresses in a glass plate on which a conductor layer including an electrolytic copper plating layer is provided, the wiring board includes: a glass plate; a first metal layer covering at least a part of the glass plate; and a second metal layer covering at least a part of the first metal layer, and the area of the first metal layer in contact with the second metal layer is smaller than the area of the second metal layer facing the first metal layer.
    Type: Application
    Filed: December 15, 2020
    Publication date: May 13, 2021
    Applicant: TOPPAN PRINTING CO.,LTD.
    Inventor: Tetsuyuki TSUCHIDA
  • Patent number: 10923439
    Abstract: A technique for making a glass core substrate that is less prone to cracking. A core substrate of the present invention includes a glass plate and a first conductor pattern provided on a first main surface of the glass plate. The first conductor pattern includes a first nickel plating layer that is provided on the first main surface of the glass plate and has a phosphorus content of 5 mass % or less and a first copper plating layer that is provided on the first nickel plating layer.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: February 16, 2021
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventor: Tetsuyuki Tsuchida
  • Publication number: 20200343199
    Abstract: A technique for making a glass core substrate that is less prone to cracking. A core substrate of the present invention includes a glass plate and a first conductor pattern provided on a first main surface of the glass plate. The first conductor pattern includes a first nickel plating layer that is provided on the first main surface of the glass plate and has a phosphorus content of 5 mass % or less and a first copper plating layer that is provided on the first nickel plating layer.
    Type: Application
    Filed: June 3, 2019
    Publication date: October 29, 2020
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventor: Tetsuyuki TSUCHIDA
  • Publication number: 20200273763
    Abstract: A glass core, a multilayer circuit board, and a method of manufacturing a glass core that appropriately form copper wiring, and suppresses crack and the like, a glass core includes: a glass plate; a first metal layer provided on the glass plate; a first electrolytic copper plating layer provided on the first metal layer; a dielectric layer provided above the first electrolytic copper plating layer; a second metal layer provided on the dielectric layer; an electroless nickel plating layer provided on the second metal layer and having a phosphorus content of less than 5 mass %; and a second electrolytic copper plating layer provided on the electroless nickel plating layer.
    Type: Application
    Filed: May 13, 2020
    Publication date: August 27, 2020
    Applicant: TOPPAN PRINTING CO.,LTD.
    Inventor: Tetsuyuki TSUCHIDA
  • Publication number: 20190287930
    Abstract: A technique for making a glass core substrate that is less prone to cracking. A core substrate of the present invention includes a glass plate and a first conductor pattern provided on a first main surface of the glass plate. The first conductor pattern includes a first nickel plating layer that is provided on the first main surface of the glass plate and has a phosphorus content of 5 mass % or less and a first copper plating layer that is provided on the first nickel plating layer.
    Type: Application
    Filed: June 3, 2019
    Publication date: September 19, 2019
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventor: Tetsuyuki TSUCHIDA
  • Publication number: 20180192510
    Abstract: A wiring substrate that helps prevent cracking of a base material at the time of formation of a light transmissive portion, has high light transmittance, and allows formation of fine wiring, and a method for manufacturing the same. The wiring substrate includes: a base material with light transmittance; a laminated body formed by laminating a metal layer and a resin layer on at least one side of the base material; and a light transmissive portion as an opening provided in part of the laminated body. The wiring substrate is characterized in that at least part of side surfaces defining the light transmissive portion is formed from the resin layer, and adjacent the surface of the base material, part of the metal layer is adjacent to the resin layer constituting at least part of the side surfaces defining the light transmissive portion and is disposed to surround the resin layer.
    Type: Application
    Filed: December 29, 2017
    Publication date: July 5, 2018
    Applicant: TOPPAN PRINTING CO., LTD.
    Inventor: Tetsuyuki TSUCHIDA
  • Patent number: 9883586
    Abstract: There is provided a wiring substrate including an electrode including Cu or a Cu alloy, a plating film having a film including at least Pd, formed on the electrode, and a solder which is bonded onto the plating film by heating, has a melting point of lower than 140° C., and includes Pd dissolved therein, a Pd concentrated layer being absent between the solder and the electrode.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: January 30, 2018
    Assignees: TOPPAN PRINTING CO., LTD., NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITY
    Inventors: Tetsuyuki Tsuchida, Toshikazu Okubo, Ikuo Shohji, Akihiro Hirata
  • Patent number: 9572252
    Abstract: A wiring substrate includes an electrode including Cu or a Cu alloy, and a plated film including an electroless nickel-plated layer formed on the electrode and an electroless gold-plated layer formed on the electroless nickel-plated layer. The electroless nickel-plated layer is formed by co-precipitation of Ni, P, Bi, and S, the electroless nickel-plated layer includes a content of P of 5% by mass or more and less than 10% by mass, a content of Bi of 1 ppm by mass to 1,000 ppm by mass, and a content of S of 1 ppm by mass to 2,000 ppm by mass, and a mass ratio of the content of S to the content of Bi (S/Bi) is more than 1.0.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: February 14, 2017
    Assignees: TOPPAN PRINTING CO., LTD., NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITY
    Inventors: Tetsuyuki Tsuchida, Toshikazu Okubo, Ikuo Shohji, Takahiro Kano
  • Publication number: 20150334828
    Abstract: There is provided a wiring substrate including an electrode including Cu or a Cu alloy, a plating film having a film including at least Pd, formed on the electrode, and a solder which is bonded onto the plating film by heating, has a melting point of lower than 140° C., and includes Pd dissolved therein, a Pd concentrated layer being absent between the solder and the electrode.
    Type: Application
    Filed: July 24, 2015
    Publication date: November 19, 2015
    Applicants: TOPPAN PRINTING CO., LTD, NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITY
    Inventors: Tetsuyuki TSUCHIDA, Toshikazu OKUBO, lkuo SHOHJI, Akihiro HIRATA
  • Publication number: 20140332259
    Abstract: A wiring substrate includes an electrode including Cu or a Cu alloy, and a plated film including an electroless nickel-plated layer formed on the electrode and an electroless gold-plated layer formed on the electroless nickel-plated layer. The electroless nickel-plated layer is formed by co-precipitation of Ni, P, Bi, and S, the electroless nickel-plated layer includes a content of P of 5% by mass or more and less than 10% by mass, a content of Bi of 1 ppm by mass to 1,000 ppm by mass, and a content of S of 1 ppm by mass to 2,000 ppm by mass, and a mass ratio of the content of S to the content of Bi (S/Bi) is more than 1.0.
    Type: Application
    Filed: July 28, 2014
    Publication date: November 13, 2014
    Applicants: TOPPAN PRINTING CO., LTD., NATIONAL UNIVERSITY CORPORATION GUNMA UNIVERSITY
    Inventors: Tetsuyuki TSUCHIDA, Toshikazu OKUBO, Ikuo SHOHJI, Takahiro KANO