Abstract: This invention offers a signal-off detection circuit allowing arbitrary setting of an issuing time (response time) of a signal disconnection alarm without being affected by a time constant of a direct current feedback circuit giving an offset voltage to an amplifier for amplifying a data signal. Input data signals per a fixed time determined by a timer is counted by a counter, and a count value is compared with a predetermined set value in a comparator. A configuration is made such that a signal disconnection alarm may be issued by detecting a disconnection state of the data signal according to a comparison result. Thereby, an issuing time of a signal disconnection alarm can be set without being affected by a time constant of a direct current feedback circuit giving an offset voltage to an amplifier for amplifying a data signal of a preceding stage.

Abstract: A detection circuit which can reliably detect an out-of-synchronism state of a clock signal with respect to data even if jitter is present in a data signal. A delayed clock signal obtained by delaying a clock signal by 90° through a delay circuit is input to a data input (D) of a flip flop, and the clock signal is read in at the point of change of the data. A logic product of the inverted output of the flip flop and the data signal is obtained by an AND circuit. Then, a logic product output is counted by a counter circuit, and an out-of-synchronism state of the clock with respect to the data is detected based on the output of the counter circuit.

Abstract: To obtain a signal-off detection circuit with improved reliability of operation by permitting an issuing of an alarm to be set without being affected by any offset voltage of an amplifier. In the signal-off detection circuit of a data-receiving circuit including: a first amplifier for amplifying a received signal; a direct current feedback circuit for adding an offset voltage to an input of the amplifier; and a discrimination circuit for receiving the amplified output of the amplifier as input and performing discrimination of data, a second amplifier for amplifying the data is independently provided, and the amplified output of this amplifier is supplied to the signal-off detection circuit. Thereby, a threshold of the signal-off detection circuit is not affected by the offset voltage of the first amplifier, and therefore the signal-off detection circuit with improved reliability of operation can be obtained.

Abstract: This invention provides a detection circuit which can reliably detect an out-of-synchronism state of a clock signal with respect to data even if jitter is present in a data signal. A delayed clock signal obtained by delaying a clock signal by 90° through a delay circuit is input to a data input (D) of a flip flop, and the clock signal is read in at the point of change of the data. A logic product of the inverted output of the flip flop and the data signal is obtained by an AND circuit. Then, a logic product output is counted by a counter circuit, and an out-of-synchronism state of the clock with respect to the data is detected based on the output of the counter circuit.

Abstract: This invention offers a signal-off detection circuit allowing arbitrary setting of an issuing time (response time) of a signal disconnection alarm without being affected by a time constant of a direct current feedback circuit giving an offset voltage to an amplifier for amplifying a data signal. Input data signals per a fixed time determined by a timer is counted by a counter, and a count value is compared with a predetermined set value in a comparator. A configuration is made such that a signal disconnection alarm may be issued by detecting a disconnection state of the data signal according to a comparison result. Thereby, an issuing time of a signal disconnection alarm can be set without being affected by a time constant of a direct current feedback circuit giving an offset voltage to an amplifier for amplifying a data signal of a preceding stage.