Patents by Inventor Tetuya Tao

Tetuya Tao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device, manufacturing method and apparatus for the same
    Patent number: 7793818
    Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: September 14, 2010
    Assignee: NEC Corporation
    Inventors: Masamoto Tago, Tomohiro Nishiyama, Tetuya Tao, Kaoru Mikagi
  • SEMICONDUCTOR DEVICE, MANUFACTURING METHOD AND APPARATUS FOR THE SAME
    Publication number: 20100015796
    Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.
    Type: Application
    Filed: September 23, 2009
    Publication date: January 21, 2010
    Applicant: NEC Corporation
    Inventors: Masamoto Tago, Tomohiro Nishiyama, Tetuya Tao, Kaoru Mikagi
  • Semiconductor device, manufacturing method and apparatus for the same
    Patent number: 7611041
    Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: November 3, 2009
    Assignee: NEC Corporation
    Inventors: Masamoto Tago, Tomohiro Nishiyama, Tetuya Tao, Kaoru Mikagi
  • SEMICONDUCTOR DEVICE, MANUFACTURING METHOD AND APPARATUS FOR THE SAME
    Publication number: 20070295786
    Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.
    Type: Application
    Filed: August 30, 2007
    Publication date: December 27, 2007
    Applicant: NEC CORPORATION
    Inventors: Masamoto Tago, Tomohiro Nishiyama, Tetuya Tao, Kaoru Mikagi
  • Semiconductor device, manufacturing method and apparatus for the same
    Patent number: 7282432
    Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: October 16, 2007
    Assignee: NEC Corporation
    Inventors: Masamoto Tago, Tomohiro Nishiyama, Tetuya Tao, Kaoru Mikagi
  • Semiconductor device, manufacturing method and apparatus for the same
    Publication number: 20050279812
    Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.
    Type: Application
    Filed: June 6, 2005
    Publication date: December 22, 2005
    Inventors: Masamoto Tago, Tomohiro Nishiyama, Tetuya Tao, Kaoru Mikagi
  • Semiconductor device, manufacturing method and apparatus for the same
    Patent number: 6969915
    Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.
    Type: Grant
    Filed: January 14, 2002
    Date of Patent: November 29, 2005
    Assignee: NEC Corporation
    Inventors: Masamoto Tago, Tomohiro Nishiyama, Tetuya Tao, Kaoru Mikagi
  • Semiconductor device, manufacturing method and apparatus for the same
    Publication number: 20020093096
    Abstract: A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead flee solder is thinly formed on a UBM layer The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.
    Type: Application
    Filed: January 14, 2002
    Publication date: July 18, 2002
    Applicant: NEC CORPORATION
    Inventors: Masamoto Tago, Tomohiro Nishiyama, Tetuya Tao, Kaoru Mikagi