Patents by Inventor Teunis Jian Ikkink

Teunis Jian Ikkink has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Driving a memory matrix of resistance hysteresis elements
    Patent number: 7643327
    Abstract: A memory matrix (10) comprises rows and columns of cells, each cell comprising a resistance hysteresis element (24) and a threshold element (22) coupled in series between a row terminal and a column terminal of the cell (20). The resistance hysteresis element (24) has a mutually larger and smaller hysteresis thresholds of mutually opposite polarity respectively. Voltage differences are applied between the column terminals and the row terminals of cells (20) in a selected row, so as to perform read actions. These voltage differences have a read polarity so that the voltage across the cell (20) is in a direction corresponding to the larger hysteresis threshold. Voltage differences are applied between the column terminals and the row terminals of cells (20) in a selected row, so as to perform erase actions, all cells (20) of a selected row being erased collectively in the erase action. The voltage differences for erase actions have the read polarity.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: January 5, 2010
    Assignee: NXP B.V.
    Inventors: Teunis Jian Ikkink, Pierre Hermanus Woerlee, Victor Martinus Van Acht, Nicolaas Lambert, Albert W. Marsman
  • DRIVING A MEMORY MATRIX OF RESISTANCE HYSTERESIS ELEMENTS
    Publication number: 20090129190
    Abstract: A memory matrix (10) comprises rows and columns of cells, each cell comprising a resistance hysteresis element (24) and a threshold element (22) coupled in series between a row terminal and a column terminal of the cell (20). The resistance hysteresis element (24) has a mutually larger and smaller hysteresis thresholds of mutually opposite polarity respectively. Voltage differences are applied between the column terminals and the row terminals of cells (20) in a selected row, so as to perform read actions. These voltage differences have a read polarity so that the voltage across the cell (20) is in a direction corresponding to the larger hysteresis threshold. Voltage differences are applied between the column terminals and the row terminals of cells (20) in a selected row, so as to perform erase actions, all cells (20) of a selected row being erased collectively in the erase action. The voltage differences for erase actions have the read polarity.
    Type: Application
    Filed: February 28, 2006
    Publication date: May 21, 2009
    Applicant: NXP B.V.
    Inventors: Teunis Jian Ikkink, Pierre Hermanus Woerlee, Victor Martinus Van Acht, Nicolaas Lambert, Albert W. Marsman