Abstract: A radio frequency identification transponder apparatus includes a transceiver. A control logic device is coupled to the transceiver. A transponder programming device is coupled to the control logic device and operable to store information, whereby the information stored is determined by the presence or absence of a printing material adjacent the transponder programming device. A conventional printing device may program the transponder programming apparatus and print transponder labels by positioning printing material adjacent the transponder programming device.

Abstract: A radio frequency identification transponder apparatus includes a transceiver. A control logic device is coupled to the transceiver. A transponder programming device is coupled to the control logic device and operable to store information, whereby the information stored is determined by the presence or absence of a printing material adjacent the transponder programming device. A conventional printing device may program the transponder programming apparatus and print transponder labels by positioning printing material adjacent the transponder programming device.

Abstract: A system, method and apparatus for constructing capped resistive vias are disclosed. In a preferred embodiment, a bare, electronic component substrate or printed circuit board via is preferably surrounded at each opening by a conductive pad. Defined by openings at a first and second surface of the substrate and a conductive material free wall defining the via is a void filled with one or more resistive inks and/or fills. A conductive cap is preferably coupled to the conductive pads such that an opening therein and the resistive fill exposed at the surface of the substrate is substantially covered. The presence of the conductive cap enables one or more electronic component conductors to be coupled directly to the capped resistive via.

Abstract: A system, method and apparatus for constructing capped resistive vias are disclosed. In a preferred embodiment, a bare, electronic component substrate or printed circuit board via is preferably surrounded at each opening by a conductive pad. Defined by openings at a first and second surface of the substrate and a conductive material free wall defining the via is a void filled with one or more resistive inks and/or fills. A conductive cap is preferably coupled to the conductive pads such that an opening therein and the resistive fill exposed at the surface of the substrate is substantially covered. The presence of the conductive cap enables one or more electronic component conductors to be coupled directly to the capped resistive via.

Abstract: A method of making a printed circuit board having zero resistance connections. Pairs of shunt pads are formed on the board, spaced sufficiently far apart to avoid short circuiting but sufficiently close to permit a solder bridge to occur between them during a solder wave process.

Abstract: A computer system including a microprocessor and a system memory coupled t provide storage to facilitate execution of computer programs by the microprocessor. An input is coupled to provide input to the microprocessor. A display is coupled to the microprocessor by a video controller and a mass storage is coupled to the microprocessor. A printed circuit board is electrically coupled to the microprocessor. The printed circuit board includes a circuit substrate having two spaced apart major surfaces and a plurality of rows of interconnect assemblies. Each row of interconnect assemblies includes a first and a second interconnect pad on a major surface of the circuit substrate. The first and the second interconnect pads are positioned on a respective reference axis. The first interconnect pad is spaced apart from the second interconnect pad by a first distance. A first and a second conductive via extend through the circuit substrate.

Abstract: A printed circuit board includes a plurality of dielectric substrates. Each of the dielectric substrates includes a first and a second surface and has a first conductive layer formed on the first surface of the respective dielectric substrate. A first pattern of lands is formed in the conductive layer of at least two of the dielectric substrates. The pattern of lands of each dielectric substrate is substantially the same. An opening is formed through each of the lands to expose the respective dielectric substrate. Each of the openings in a respective pattern of lands has a diameter different than at least a portion of the other openings in the same pattern. The plurality of dielectric substrates are laminated in stacked relationship.