Abstract: A first-in-first-out (FIFO) storage structure within an integrated-circuit component is loaded with qualification values corresponding to respective pairs of edges expected within a timing strobe signal transmitted to the integrated-circuit component. The qualification values are sequentially output from the FIFO storage structure during respective cycles of the timing strobe signal and a gate signal is either asserted or deasserted during the respective cycles of the timing strobe signal according to the qualification values output from the FIFO storage structure.

Abstract: A first-in-first-out (FIFO) storage structure within an integrated-circuit component is loaded with qualification values corresponding to respective pairs of edges expected within a timing strobe signal transmitted to the integrated-circuit component. The qualification values are sequentially output from the FIFO storage structure during respective cycles of the timing strobe signal and a gate signal is either asserted or deasserted during the respective cycles of the timing strobe signal according to the qualification values output from the FIFO storage structure.

Abstract: A nonlinearity compensation technique for a CO-OFDM transmission system in which a proportion (e.g. up to 50%) of OFDM subcarriers is transmitted along with a phase-conjugate copy (PCP) on another subcarrier (replacing a data carrying subcarrier) to enable nonlinear distortion compensation. Nonlinear distortion experienced by closely spaced subcarriers in an OFDM system is highly correlated. The PCPs are used at the receiver to estimate the nonlinear distortion (e.g. nonlinear phase shift) of their respective original subcarriers and other subcarriers close to the PCP. With this technique, the optical fibre nonlinearity due to the Kerr effect in OFDM systems can be effectively compensated without the complexity of DBP or 50% loss in capacity of the phase conjugate twin wave (PC-TW) technique. Moreover, the technique proposed herein can be effectively implemented in both single polarization and PMD systems, in both single channel and WDM systems.

Abstract: An improved multi-port register file system and method of operating. The multi-port register file memory system comprises: n single memory bit cells each storing a data value and having a single bit cell write port and a single read port connecting a respective local bit line, wherein corresponding parallel activated single bit cells output a stored data value in parallel at n read port outputs to a respective local bit line of n local bit lines, each single bit cell accessed in parallel according to a decoded read address signal. A receiver device is provided implementing n selection logic devices corresponding to n read ports, each selection logic device receiving each the n local bit line output values from the n single bit cells, and implementing logic based directly on the decoded read address signal to select a respective local bit line output as a global output bit.

Abstract: An improved multi-port register file system and method of operating. The multi-port register file memory system comprises: n single memory bit cells each storing a data value and having a single bit cell write port and a single read port connecting a respective local bit line, wherein corresponding parallel activated single bit cells output a stored data value in parallel at n read port outputs to a respective local bit line of n local bit lines, each single bit cell accessed in parallel according to a decoded read address signal. A receiver device is provided implementing n selection logic devices corresponding to n read ports, each selection logic device receiving each the n local bit line output values from the n single bit cells, and implementing logic based directly on the decoded read address signal to select a respective local bit line output as a global output bit.

Abstract: A method of detecting and classifying mental states, comprising the steps of: detecting bio-signals from one or more than one bio-signal detector; transforming the bio-signals into one or more than one different representations; detecting values of one or more than one property of the transformed bio-signal representations; and applying one or more than one mental state detection algorithm to the detected properties in order to classify whether the bio-signals indicate the presence of a predetermined response by a subject.

Abstract: A multi-chip package comprising at least a first die and a second die, wherein each die comprises an integrated circuit (IC) disposed thereon. Each of the first die and the second die comprise a plurality of contact pads coupled with the respective IC. The contact pads on the first IC comprise a first mode pad coupled to a first device formed on the first die, and the contact pads on the second IC comprise a second mode pad coupled to a second device formed on the second die. The first mode pad is coupled to a first potential and causes the first device to operate in a first mode. The second mode pad is coupled to a second potential and causes the second device to operate in a second mode. The first and second mode are selected based on the relative position of the first and second die.

Abstract: A temperature compensated delay circuit for delaying a signal within an integrated circuit includes a temperature sensor. The temperature sensor is configured to sense a temperature proximal to the integrated circuit and configured to provide a control signal representative of the sensed temperature proximal to the integrated circuit. A delay chain is configured to receive a signal and provide a plurality of output signals. Each output signal has a time delay distinct from other output signals. A multiplexer is configured to receive the plurality of output signals from the delay chain and to receive the control signal from the temperature sensor representative of the sensed temperature. The multiplexer is configured to provide a temperature compensated delayed output signal.

Abstract: A method of interacting with an application includes receiving, in a processor, data generated based on signals from one or more bio-signal detectors on a user, the data representing a mental state or facial expression of the user, generating an input event based on the data representing the mental state or facial expression of the user of the user, and passing the input event to an application.

Abstract: An off-chip driver (OCD) circuit and technique to reduce skew between rising and falling edges of output signals as process conditions vary are provided. Variations in process conditions may result in stronger or weaker relative current drive between NMOS and PMOS transistors. One or more process-dependent compensating current paths may be added to conventional pull-up and/or pull-down current paths to compensate for process variations by supplementing the current drive of transistors used to charge (PMOS) or discharge (NMOS) an output node of and end driver (e.g., inverter) stage of an OCD.

Abstract: A method of detecting and classifying facial muscle movements, comprising the steps of: receiving bio-signals from at least one bio-signal detector; and applying at least one facial muscle movement-detection algorithm to a portion of the bio-signals affected by a predefined type of facial muscle movement in order to detect facial muscle movements of that predefined type.

Abstract: A method of detecting and classifying mental states, comprising the steps of receiving bio-signals from one or more bio-signal detectors; generating multiple different representations of each bio-signal; determining the value of one or more features of the each bio-signal representation; and comparing the feature values to one or more than one mental state signature, each mental state signature defining reference feature values indicative of a predetermined mental state.

Abstract: An exchange-coupled magnetic structure includes a ferromagnetic layer, a coercive ferrite layer, such as cobalt-ferrite, for biasing the magnetization of the ferromagnetic layer, and an oxide underlayer, such as cobalt-oxide, in proximity to the coercive ferrite layer. The oxide underlayer has a lattice structure of either rock salt or a spinel and exhibits no magnetic moment at room temperature. The underlayer affects the structure of the coercive ferrite layer and therefore its magnetic properties, providing increased coercivity and enhanced thermal stability. As a result, the coercive ferrite layer is thermally stable at much smaller thicknesses than without the underlayer. The exchange-coupled structure is used in spin valve and magnetic tunnel junction magnetoresistive sensors in read heads of magnetic disk drive systems. Because the coercive ferrite layer can be made as thin as 1 nm while remaining thermally stable, the sensor satisfies the narrow gap requirements of high recording density systems.

Abstract: An exchange-coupled magnetic structure includes a ferromagnetic layer, a coercive ferrite layer, such as cobalt-ferrite, for biasing the magnetization of the ferromagnetic layer, and an oxide underlayer, such as cobalt-oxide, in proximity to the coercive ferrite layer. The oxide underlayer has a lattice structure of either rock salt or a spinel and exhibits no magnetic moment at room temperature. The underlayer affects the structure of the coercive ferrite layer and therefore its magnetic properties, providing increased coercivity and enhanced thermal stability. As a result, the coercive ferrite layer is thermally stable at much smaller thicknesses than without the underlayer. The exchange-coupled structure is used in spin valve and magnetic tunnel junction magnetoresistive sensors in read heads of magnetic disk drive systems. Because the coercive ferrite layer can be made as thin as 1 nm while remaining thermally stable, the sensor satisfies the narrow gap requirements of high recording density systems.

Abstract: A memory device includes a delay-locked loop circuit having delay elements and a synchronization circuit coupled to the delay-locked loop circuit. The synchronization circuit receives a synchronization enable signal and outputs a plurality of enable signals, including an enable signal coupled to an output circuit. Because the enable signal is synchronized with the read signal, it is possible to provide more time to read data into the buffer. A method of reading data from a memory device couples a synchronization enable signal and an external clock signal to a synchronization circuit. A read signal and an output enable are generated based upon a synchronization enable signal and a delayed clock signal of the external clock signal. Because the output signal is synchronized to the read signal, more time is allowed for the sense function.

Abstract: A random access memory comprises a plurality of data pads and an array of memory cells comprising a first portion of memory cells and a second portion of memory cells. The random access memory comprises a first line configured to receive first data signals between the first portion of memory cells and the data pads and a second line configured to receive second data signals between the second portion of memory cells and the data pads. The first portion of memory cells is configured to be made inaccessible to eliminate the first data signals and a first number of the data pads and the second portion of memory cells is configured to be made inaccessible to eliminate the second data signals and a second number of the data pads.

Abstract: A self-alignment system for complement clock signals includes a first delay circuit and a second delay circuit. A first clock signal may be propagated through the first delay circuit and a second clock signal may be propagated through the second delay circuit. A propagation delay of each of the first and second delay circuits may be selectively varied as a function of the first and second clock signals.

Abstract: A system and method for refreshing data in a dynamic random access memory (“DRAM”) is provided, where the system includes a data memory having a plurality of memory banks, a map memory in signal communication with the data memory for translating an internal address of each of the plurality of memory banks into a corresponding external address, a map comparator in signal communication with the map memory for selectively enabling a memory bank in accordance with its external address, a refresh address generator in signal communication with the map comparator for selectively refreshing the enabled memory bank in accordance with its external address, and a refresh counter in signal communication with the refresh address generator for signaling a refresh in accordance with the maximum required refresh time of the enabled memory bank; and where the corresponding method includes determining the maximum required refresh period for each of the memory banks, respectively, prioritizing the memory banks in accordance wit

Abstract: An exchange-coupled magnetic structure includes a ferromagnetic layer, a coercive ferrite layer, such as cobalt-ferrite, for biasing the magnetization of the ferromagnetic layer, and an oxide underlayer, such as cobalt-oxide, in proximity to the coercive ferrite layer. The oxide underlayer has a lattice structure of either rock salt or a spinel and exhibits no magnetic moment at room temperature. The underlayer affects the structure of the coercive ferrite layer and therefore its magnetic properties, providing increased coercivity and enhanced thermal stability. As a result, the coercive ferrite layer is thermally stable at much smaller thicknesses than without the underlayer. The exchange-coupled structure is used in spin valve and magnetic tunnel junction magnetoresistive sensors in read heads of magnetic disk drive systems. Because the coercive ferrite layer can be made as thin as 1 nm while remaining thermally stable, the sensor satisfies the narrow gap requirements of high recording density systems.

Abstract: A method of adjusting a control signal that includes generating a control signal at an unknown frequency and automatically adjusting the unknown frequency of the control signal based on the unknown frequency.