Abstract: A method of thermal mitigation in a device having a plurality of non-real-time processing units (PUs) and a plurality of real-time PUs, including connecting each of the plurality of real-time PUs and the plurality of non-real-time PUs to a first power supply, and performing thermal mitigation. Performing thermal mitigation includes disconnecting each of the plurality of non-real-time PUs except one of the plurality of non-real-time PUs from the first power supply resulting in an active non-real-time PU, and connecting a second power supply that derives power from the first power supply to the active non-real-time PU, wherein a voltage supplied by the second power supply is less than a voltage supplied by the first power supply.

Abstract: A method of thermal mitigation in a device having a plurality of non-real-time processing units (PUs) and a plurality of real-time PUs, including connecting each of the plurality of real-time PUs and the plurality of non-real-time PUs to a first power supply, and performing thermal mitigation. Performing thermal mitigation includes disconnecting each of the plurality of non-real-time PUs except one of the plurality of non-real-time PUs from the first power supply resulting in an active non-real-time PU, and connecting a second power supply that derives power from the first power supply to the active non-real-time PU, wherein a voltage supplied by the second power supply is less than a voltage supplied by the first power supply.

Abstract: Systems and methods are disclosed for providing micro-idle memory power management. One embodiment of a method comprises receiving and storing an exit latency vote from each of a plurality of memory subsystems on a system on chip electrically coupled to a system memory. In response to a micro-idle memory state in which each of the memory subsystems are idle, a minimum exit latency value from the plurality of exit latency votes is determined. One of a plurality of system memory modes is selected which has a micro-idle sleep time that meets the minimum exit latency value while minimizing system memory power consumption. The selected system memory mode is initiated.

Abstract: A method of thermal mitigation in a device having a plurality of non-real-time processing units (PUs) and a plurality of real-time PUs, including connecting each of the plurality of real-time PUs and the plurality of non-real-time PUs to a first power supply, and performing thermal mitigation. Performing thermal mitigation includes disconnecting each of the plurality of non-real-time PUs except one of the plurality of non-real-time PUs from the first power supply resulting in an active non-real-time PU, and connecting a second power supply that derives power from the first power supply to the active non-real-time PU, wherein a voltage supplied by the second power supply is less than a voltage supplied by the first power supply.

Abstract: Methods, systems, and circuits for preserving state information during power saving operations are disclosed. One example embodiment includes a circuit having a processing core, where the processing core includes logic processing circuits as well as circuits (e.g., flip-flops registers) that are used to store state information in the processing core. The logic processing circuits have power connections to a power rail that are subject to a switch, which can disconnect the power connections from the power rail. The circuits that are used to store state information have different power connections that are subject to a different switch. Therefore, the logic processing circuits and the state information circuits can be separately power-collapsed.

Abstract: Methods, systems, and circuits for preserving state information during power saving operations are disclosed. One example embodiment includes a circuit having a processing core, where the processing core includes logic processing circuits as well as circuits (e.g., flip-flops registers) that are used to store state information in the processing core. The logic processing circuits have power connections to a power rail that are subject to a switch, which can disconnect the power connections from the power rail. The circuits that are used to store state information have different power connections that are subject to a different switch. Therefore, the logic processing circuits and the state information circuits can be separately power-collapsed.

Abstract: A method of thermal mitigation in a device having a plurality of non-real-time processing units (PUs) and a plurality of real-time PUs, including connecting each of the plurality of real-time PUs and the plurality of non-real-time PUs to a first power supply, and performing thermal mitigation. Performing thermal mitigation includes disconnecting each of the plurality of non-real-time PUs except one of the plurality of non-real-time PUs from the first power supply resulting in an active non-real-time PU, and connecting a second power supply that derives power from the first power supply to the active non-real-time PU, wherein a voltage supplied by the second power supply is less than a voltage supplied by the first power supply.

Abstract: Application level switching of transactions at a gateway is provided. The gateway is configured to switch the transaction based on the application level content, a current state of a transport environment, and/or dynamic rules for switching transactions. For example, several possible service providers can be selected for the type of transaction, and the gateway can monitor not only the round-trip time through the network(s) to different possible service providers, but also the time required to complete the transaction at the application level and return a response. The application is chosen on the sending side of the network, and application level formatting is done on the sending side as well. The gateway uses modular code and data, and separate instances of processing code to allow dynamic updating. Rules for application service selection can be selectively uploaded to the gateway from a client. The rules for different available application services can be distributed across different gateways.

Abstract: Application level switching of transactions at a gateway is provided. The gateway is configured to switch the transaction based on the application level content, a current state of a transport environment, and/or dynamic rules for switching transactions. For example, several possible service providers can be selected for the type of transaction, and the gateway can monitor not only the round-trip time through the network(s) to different possible service providers, but also the time required to complete the transaction at the application level and return a response. The application is chosen on the sending side of the network, and application level formatting is done on the sending side as well. The gateway uses modular code and data, and separate instances of processing code to allow dynamic updating. Rules for application service selection can be selectively uploaded to the gateway from a client. The rules for different available application services can be distributed across different gateways.

Abstract: Application level switching of transactions at a gateway is provided. The gateway is configured to switch the transaction based on the application level content, a current state of a transport environment, and/or dynamic rules for switching transactions. For example, several possible service providers can be selected for the type of transaction, and the gateway can monitor not only the round-trip time through the network(s) to different possible service providers, but also the time required to complete the transaction at the application level and return a response. The application is chosen on the sending side of the network, and application level formatting is done on the sending side as well. The gateway uses modular code and data, and separate instances of processing code to allow dynamic updating. Rules for application service selection can be selectively uploaded to the gateway from a client. The rules for different available application services can be distributed across different gateways.

Abstract: A parse/build engine that can handle multi-format financial messages. The engine converts the different format messages into a common format, and the common format message is then processed by the business service application. A parser examines the message and determines an appropriate schema for the particular format of message received. The schema is a data structure in a schema registry that includes a grammar structure for the received format as well as pointers to handlers for converting the different fields of the message into the internal message format using the grammar structure (the “grammar” can include field sequence, field type, length, character encoding, optional and required fields, etc.). The handlers are individually compiled. As formats change, new formats or changes to old formats can be dynamically added to the parse/build engine by loading new schema and handlers.

Abstract: Application level switching of transactions at a gateway is provided. The gateway is configured to switch the transaction based on the application level content, a current state of a transport environment, and/or dynamic rules for switching transactions. For example, several possible service providers can be selected for the type of transaction, and the gateway can monitor not only the round-trip time through the network(s) to different possible service providers, but also the time required to complete the transaction at the application level and return a response. The application is chosen on the sending side of the network, and application level formatting is done on the sending side as well. The gateway uses modular code and data, and separate instances of processing code to allow dynamic updating. Rules for application service selection can be selectively uploaded to the gateway from a client. The rules for different available application services can be distributed across different gateways.