Abstract: A planar doped valley field effect transistor (PDVFET), which positions more than one two-dimensional electron gas (2DEG) layer within a homo-structure (GaAs), in order to improve the FET's power output. The FET includes two 2DEG donor planes with an undoped GaAs layer therebetween, and a n-doped GaAs layer on the other side of each donor plane. The FET also includes a 2DEG acceptor plane below the n-doped GaAs layer, which is furthest from the contacts. This 2DEG plane combination forms a deep and wide valley in the FET's conduction band, which improves the FET's power output.

Abstract: Electrical devices are characterized by optically triggering an electrical signal onto the device and then optically sampling the electrical signal waveform on the device.

Abstract: The planar transmission line attenuator and switch is formed on a flat piece of semiconductor material. Transmission line metallic conductors are deposited on a flat surface of the semiconductor material, and at least one of the metallic conductors forms a Schottky barrier contact to this flat semiconductor surface. The gap between the metallic conductors defines a shunt current path through the semiconductor material. The semiconductor material at the surface in contact with the transmission line conductor must be conductive. By applying a bias voltage to the metallic conductor forming the Schottky barrier contact, the conductivity of the shunt path can be controlled by changing the depletion layer width across the Schottky barrier. A plurality of planar transmission line switches can be combined into multi-port networks, examples of which are cross-bar switching devices and .beta. element switching devices.