Abstract: A sprocket wheel for driving an edge driven helical belt conveyor in a food handling facility, such as a freezing facility, comprising at least one integral body with a curved wheel rim part, said curved wheel rim part comprising at least two parallel rows of teeth; and a hub for carrying the integral body and for providing for attachment to a shaft.

Abstract: Methods and apparatuses implement a thermal memory effect for a solid state power controller. A solid state power controller trip apparatus with thermal memory according to one embodiment comprises: a trip module including a first capacitor (156) and a counter (174), wherein the first capacitor (156) charges multiple times, when an over current event occurs, and the counter (174) accumulates a count related to the charging of the first capacitor (156) for the multiple times, to detect a trip condition; and a discharging module connected to the trip module, the discharging module including a resistor (166) and a second capacitor (158), wherein an electrical parameter associated with the count decays with time using the resistor (166) and the second capacitor (158).

Abstract: The present invention provides an overload protection circuit having a first switch connected at a first side to a source of electrical power and at a second side to a load, the switch having on and off modes and a second switch connected between the first switch second side and ground, the second switch having on and off modes. A control module generates at least one signal controlling the first switch mode and the second switch mode wherein the signal turns the second switch to the off mode when turning the first switch to the on mode and the signal turning the second switch to an on mode when turning the first switch to the off mode. Both over current and leakage protection are thereby achieved.

Abstract: The present invention provides an overload protection circuit having a first switch connected at a first side to a source of electrical power and at a second side to a load, the switch having on and off modes and a second switch connected between the first switch second side and ground, the second switch having on and off modes. A control module generates at least one signal controlling the first switch mode and the second switch mode wherein the signal turns the second switch to the off mode when turning the first switch to the on mode and the signal turning the second switch to an on mode when turning the first switch to the off mode. Both over current and leakage protection are thereby achieved.

Abstract: Methods and apparatuses implement a thermal memory effect for a solid state power controller. A solid state power controller trip apparatus with thermal memory according to one embodiment comprises: a trip module including a first capacitor (156) and a counter (174), wherein the first capacitor (156) charges multiple times, when an over current event occurs, and the counter (174) accumulates a count related to the charging of the first capacitor (156) for the multiple times, to detect a trip condition; and a discharging module connected to the trip module, the discharging module including a resistor (166) and a second capacitor (158), wherein an electrical parameter associated with the count decays with time using the resistor (166) and the second capacitor (158).

Abstract: A power supply device (20) for an electrical system generates a primary logic supply voltage signal and one or more backup logic supply voltage signals from a plurality of sources (22, 24). The primary and backup logic supply voltage signals are distributed throughout the electrical system to provide a redundant logic supply to various components (330).

Abstract: A solid state power controller (SSPC) (100) includes a power switching controller (30) and power switching devices (PSDs) (20A, 20B, 20C) for controlling each phase of a multiple-phase load to switch-on or -off at a zero-crossing point of a corresponding phase of a multiple-phase power source. The power switching controller (30) may include an ASIC (25A, 25B, 25C) for controlling each PSD (20A, 20B, 20C) to switch the corresponding load phase on or off. The ASIC (25A, 25B, 25C) may be configured to control the PSD (20A, 20B, 20C) to switch-on the load phase at a detected zero-crossing point of the voltage supplied by the corresponding phase of the power source, and to switch-off the load phase at a detected zero-crossing point of the load current supplied by the corresponding phase of the power source.

Abstract: A multi-stage dynamic braking resistor network (23) is provided that includes a plurality of dynamic brake resistors (1a–d) for dissipating, as heat, regenerative energy inputted onto a system bus (17) by a motor or actuator (19), and a plurality of switches (31a–d) for connecting the dynamic brake resistors (1a–d) to and from the system bus (17), respectively. The multi-stage dynamic braking resistor network (23) further includes a control circuit (25) for controlling the switches (31a–d) such that the dynamic brake resistors (1a–d) are connected to and from the system bus (17) on the basis of a predetermined voltage threshold of the system bus and on the basis of a predetermined rotation pattern.

Abstract: A power supply device (20) for an electrical system generates a primary logic supply voltage signal and one or more backup logic supply voltage signals from a plurality of sources (22, 24). The primary and backup logic supply voltage signals are distributed throughout the electrical system to provide a redundant logic supply to various components (330).

Abstract: A multi-stage dynamic braking resistor network (23) is provided that includes a plurality of dynamic brake resistors (1a-d) for dissipating, as heat, regenerative energy inputted onto a system bus (17) by a motor or actuator (19), and a plurality of switches (31a-d) for connecting the dynamic brake resistors (1a-d) to and from the system bus (17), respectively. The multi-stage dynamic braking resistor network (23) further includes a control circuit (25) for controlling the switches (31a-d) such that the dynamic brake resistors (1a-d) are connected to and from the system bus (17) on the basis of a predetermined voltage threshold of the system bus and on the basis of a predetermined rotation pattern.

Abstract: A solid state power controller (SSPC) (100) includes a power switching controller (30) and power switching devices (PSDs) (20A, 20B, 20C) for controlling each phase of a multiple-phase load to switch-on or -off at a zero-crossing point of a corresponding phase of a multiple-phase power source. The power switching controller (30) may include an ASIC (25A, 25B, 25C) for controlling each PSD (20A, 20B, 20C) to switch the corresponding load phase on or off. The ASIC (25A, 25B, 25C) may be configured to control the PSD (20A, 20B, 20C) to switch-on the load phase at a detected zero-crossing point of the voltage supplied by the corresponding phase of the power source, and to switch-off the load phase at a detected zero-crossing point of the load current supplied by the corresponding phase of the power source.