Abstract: A power semiconductor bridge circuit includes two power semiconductor components connected in series between positive and negative voltage sources. A connection between the two power semiconductor components is connected in common to an unsteady load. The connections between each power semiconductor component and a respective one of the positive and negative voltage sources includes at least two parallel-connected conductors. By reducing the current variation in each conductor, the parallel connections reduce self-induction and thereby voltage spikes due to rapid variations in the unsteady load. In one embodiment, one of the conductors connecting to the positive voltage source is arranged parallel to, and spatially proximate to, one conductor connecting to the negative source and likewise with the conductors connecting to the negative voltage source. In the latter embodiment, a further reduction in induction is obtained.