Patents by Inventor Theodore C. Cheston

Theodore C. Cheston has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4937584
    Abstract: A method of nulling out interference sources in a large-aperture phased ay radar system is described. The system has apriori knowledge of the interference sources and depends upon access to the array element phase shifters for injection of phase only or phase and amplitude perturbations, of a mainbeam aperture distribution, into said array element phase shifters. The phase or phase and amplitude perturbations are derived from an aperture ripple modulation algorithm. The system does not require any auxiliary elements or correlators or beamformers.A method of nulling out interference sources in a monopulse large-aperture phased array radar system is also described wherein the phase only or phase and amplitude perturbations are injected into both the sum and difference beams.
    Type: Grant
    Filed: December 22, 1988
    Date of Patent: June 26, 1990
    Assignee: United States of America as represented by the Secretary of the Navy
    Inventors: William F. Gabriel, Theodore C. Cheston
  • Patent number: 4580140
    Abstract: A phased array lens antenna which includes a lens having two faces disposed ubstantially at a right angle to each other. Transmit-receive modules which include phase-shifters are shared between the two lens faces. Two lens antennas positioned in back-to-back relationship about a ship superstructure scan 360.degree..
    Type: Grant
    Filed: June 17, 1983
    Date of Patent: April 1, 1986
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Theodore C. Cheston
  • Patent number: H1773
    Abstract: The architecture of this invention makes multiple use of switched time-delay circuits to reduce the complexity of both series and parallel feed antenna arrays. Each time-delay circuit can give a delay that can be switched to values between 0 and 2d/c, where d is the inter-element spacing and c is the velocity of light. At the highest frequency of the series feed array, the elements are spaced by .lambda./2 to avoid grating lobes and the maximum delay corresponds to 360.degree. of phaseshift. When the time-delays are set half way (d/c), the various lines feeding the elements of the array at the aperture have bias delays that make them all equal in length, thereby giving a broadside beam, independent of frequency. At the highest frequency, the switchable time delay gives some excess in available delay. If additional excess time-delay is needed it can be obtained by increasing the time delay circuit range. Insertion loss is proportional to the number of bits used.
    Type: Grant
    Filed: February 10, 1998
    Date of Patent: January 5, 1999
    Assignee: United States of America
    Inventors: Theodore C. Cheston, H. Paris Coleman