Abstract: A process for eliminating the effects of parasitic paths from stringers by forming diversionary paths in the overhangs in which the stringers are formed. The diversionary paths are selected such that the stringers formed in these paths are harmless to the operation of the circuit. For instance, in the formation of floating gate memory array where first and second polysilicon lines are formed are right angles to each other and then the first lines are etched in alignment with the second line to form the floating gates the invention is implemented by forming gaps in the first lines between the second lines. In this way, stringers formed from the second polysilicon layer are diverted. Consequently, the parasitic paths are paths in parallel with the second lines (word lines) instead of shorts between adjacent word lines.