Patents by Inventor Theodore D. Lowes

Theodore D. Lowes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150348948
    Abstract: A Light Emitting Diode (LED) component includes discrete LED dies that are spaced apart from one another. An electrical connection element is provided adjacent the LED dies and configured to electrically connect the discrete LED dies in series and/or in parallel. A unitary optically transparent structure is provided on the second faces of the LED dies remote from the anode and cathode contacts, that spans the plurality of LED dies. The LED component is unsupported by a submount that spans adjacent ones of the LED dies. The electrical connection element may be a patterned metal sheet that is patterned to electrically connect the discrete LED dies in series and/or in parallel. The electrical connection element may also be wire bonds adjacent the LED dies that are arranged to electrically connect the discrete LED dies in series and/or in parallel.
    Type: Application
    Filed: May 28, 2014
    Publication date: December 3, 2015
    Applicant: Cree, Inc.
    Inventors: Peter S. Andrews, Christopher P. Hussell, Fan Zhang, Theodore D. Lowes
  • Patent number: 9035328
    Abstract: An LED component includes, according to a first embodiment, a monolithic substrate, an array of LED chips disposed on a surface of the substrate, and an optical lens overlying the LED chips and having a lens base attached to the substrate, where the LED chips are positioned to provide a peak emission shifted from a perpendicular centerline of the lens base. The LED component includes, according to a second embodiment, a monolithic substrate, an array of LED chips disposed on a surface of the substrate, and an array of optical lenses, each optical lens overlying at least one of the LED chips and having a lens base attached to the substrate, where at least one of the LED chips is positioned to provide a peak emission shifted from a perpendicular centerline of the respective lens base.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: May 19, 2015
    Assignee: Cree, Inc.
    Inventors: Theodore D. Lowes, Eric J. Tarsa, Bernd P. Keller, David T. Emerson
  • Patent number: 8410371
    Abstract: A submount for an electronic device includes an electrically insulating substrate including first and second surfaces and having a thickness between the first and second surfaces, a thermally conductive pad on the first surface of the substrate, and a thermally conductive via extending from the first surface of the substrate toward the second surface of the substrate and having a length that is less than the thickness of the substrate. The thermally conductive via has a higher thermal conductivity than a thermal conductivity of the substrate. Methods of forming submounts are also disclosed.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: April 2, 2013
    Assignee: Cree, Inc.
    Inventors: Peter S. Andrews, Theodore D. Lowes, Robert D. Underwood
  • Publication number: 20120280261
    Abstract: A light emitting diode (LED) for achieving an asymmetric light output includes a multilayered structure comprising a p-n junction, where at least one layer of the multilayered structure comprises a surface configured to provide a peak emission in a direction away from a normal to a mounting surface, the surface being a top or bottom surface of the layer.
    Type: Application
    Filed: May 4, 2011
    Publication date: November 8, 2012
    Applicant: Cree, Inc.
    Inventors: Eric J. Tarsa, Theodore D. Lowes, Bernd P. Keller
  • Publication number: 20120199852
    Abstract: An LED component includes, according to a first embodiment, a monolithic substrate, an array of LED chips disposed on a surface of the substrate, and an optical lens overlying the LED chips and having a lens base attached to the substrate, where the LED chips are positioned to provide a peak emission shifted from a perpendicular centerline of the lens base. The LED component includes, according to a second embodiment, a monolithic substrate, an array of LED chips disposed on a surface of the substrate, and an array of optical lenses, each optical lens overlying at least one of the LED chips and having a lens base attached to the substrate, where at least one of the LED chips is positioned to provide a peak emission shifted from a perpendicular centerline of the respective lens base.
    Type: Application
    Filed: February 4, 2011
    Publication date: August 9, 2012
    Applicant: CREE, INC.
    Inventors: Theodore D. Lowes, Eric J. Tarsa, Bernd P. Keller, David T. Emerson
  • Publication number: 20120049214
    Abstract: A packaged light emitting diode (LED) includes a submount, a monolithic multi-junction LED on the submount, and an encapsulant material on the monolithic multi-junction LED. The monolithic multi-junction LED includes a substrate, a plurality of sub-LEDs on the submount, a plurality of conductive metal interconnects coupled to the sub-LEDs and connecting the sub-LEDs in a predetermined arrangement including an anode contact and a cathode contact, and an electrostatic discharge protection circuit in the substrate and coupled in parallel with the arrangement of sub-LEDs.
    Type: Application
    Filed: July 25, 2011
    Publication date: March 1, 2012
    Inventors: Theodore D. Lowes, James Ibbetson, Sten Helkman, Tao Tong
  • Publication number: 20110056734
    Abstract: A submount for an electronic device includes an electrically insulating substrate including first and second surfaces and having a thickness between the first and second surfaces, a thermally conductive pad on the first surface of the substrate, and a thermally conductive via extending from the first surface of the substrate toward the second surface of the substrate and having a length that is less than the thickness of the substrate. The thermally conductive via has a higher thermal conductivity than a thermal conductivity of the substrate. Methods of forming submounts are also disclosed.
    Type: Application
    Filed: September 8, 2009
    Publication date: March 10, 2011
    Inventors: Peter S. Andrews, Theodore D. Lowes, Robert D. Underwood
  • Patent number: 6472126
    Abstract: A process is provided for creating microstructure coupling guides for aligning photonic devices with optical signal carrying apparatuses. The process includes applying a photoresist to a semiconductor material, spinning the semiconductor material, baking the semiconductor material, exposing the photoresist, baking the semiconductor material a second time, and developing the resist. The process creates a microstructure that acts as an integral guide to align and maintain the relative position between an optical signal carrying apparatus and a photonic device.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: October 29, 2002
    Assignee: Gore Enterprise Holdings, Inc.
    Inventors: Robert F. Traver, Jr., Theodore D. Lowes, Mark N. Donhowe, Sean P. Kilcoyne
  • Patent number: 6151430
    Abstract: A process is provided for creating microstructure coupling guides for aligning photonic devices with optical signal carrying apparatuses. The process includes applying a photoresist to a semiconductor material, spinning the semiconductor material, baking the semiconductor material, exposing the photoresist, baking the semiconductor material a second time, and developing the resist. The process creates a microstructure that acts as an integral guide to align and maintain the relative position between an optical signal carrying apparatus and a photonic device.
    Type: Grant
    Filed: July 8, 1998
    Date of Patent: November 21, 2000
    Assignee: Gore Enterprise Holdings, Inc.
    Inventors: Robert F. Traver, Jr., Theodore D. Lowes, Mark N. Donhowe, Sean P. Kilcoyne