Abstract: Disclosed are prodrugs of myeloperoxidase (MPO) inhibitors, methods of treating MPO related disorders, e.g., multiple system atrophy, amyotrophic lateral sclerosis, and Huntington's disease, and methods of neuroprotection, which include administering to a patient in need thereof the prodrugs, pharmaceutical compositions including the prodrugs, and kits including the pharmaceutical compositions and instructions for use.

Abstract: A method for analyzing an integrated circuit includes: applying an electric test pattern to the IC; delivering a stream of primary electrons to a back side of the IC on an active region to a transistor of interest, the active region including active structures such as transistors of the IC; detecting light resulting from cathodoluminescence initiated by secondary electrons in the IC; and analyzing the detected light regarding a correlation with the electric test pattern applied to the IC. A system for analyzing an IC is provided.

Abstract: Method to extract timing diagrams from synchronized single- or two-photon pulsed LADA by spatially positioning the incident laser beam on circuit feature of interest, temporally scanning the arrival time of the laser pulse with respect to the tester clock or the loop length trigger signal, then recording the magnitude and sign of the resulting fail rate signature per laser pulse arrival time. A Single-Photon Laser-Assisted Device Alteration apparatus applies picosecond laser pulses of wavelength having photon energy equal to or greater than the silicon band-gap. A Two-Photon Laser-Assisted Device Alteration apparatus applies femtosecond laser pulses of wavelength having photon energy equal to or greater than half the silicon band-gap at the area of interest. The laser pulses are synchronized with test vectors so that pass/fail ratios can be altered using either the single-photon or the two-photon absorption effect. A sequence of synthetic images with error data illustrates timing sensitive locations.

Abstract: A method for analyzing an integrated circuit includes: applying an electric test pattern to the IC; delivering a stream of primary electrons to a back side of the IC on an active region to a transistor of interest, the active region including active structures such as transistors of the IC; detecting light resulting from cathodoluminescence initiated by secondary electrons in the IC; and analyzing the detected light regarding a correlation with the electric test pattern applied to the IC. A system for analyzing an IC is provided.

Abstract: Method to extract timing diagrams from synchronized single- or two-photon pulsed LADA by spatially positioning the incident laser beam on circuit feature of interest, temporally scanning the arrival time of the laser pulse with respect to the tester clock or the loop length trigger signal, then recording the magnitude and sign of the resulting fail rate signature per laser pulse arrival time. A Single-Photon Laser-Assisted Device Alteration apparatus applies picosecond laser pulses of wavelength having photon energy equal to or greater than the silicon band-gap. A Two-Photon Laser-Assisted Device Alteration apparatus applies femtosecond laser pulses of wavelength having photon energy equal to or greater than half the silicon band-gap at the area of interest. The laser pulses are synchronized with test vectors so that pass/fail ratios can be altered using either the single-photon or the two-photon absorption effect. A sequence of synthetic images with error data illustrates timing sensitive locations.

Abstract: Method to extract timing diagrams from synchronized single- or two-photon pulsed LADA by spatially positioning the incident laser beam on circuit feature of interest, temporally scanning the arrival time of the laser pulse with respect to the tester clock or the loop length trigger signal, then recording the magnitude and sign of the resulting fail rate signature per laser pulse arrival time. A Single-Photon Laser-Assisted Device Alteration apparatus applies picosecond laser pulses of wavelength having photon energy equal to or greater than the silicon band-gap. A Two-Photon Laser-Assisted Device Alteration apparatus applies femtosecond laser pulses of wavelength having photon energy equal to or greater than half the silicon band-gap at the area of interest. The laser pulses are synchronized with test vectors so that pass/fail ratios can be altered using either the single-photon or the two-photon absorption effect. A sequence of synthetic images with error data illustrates timing sensitive locations.

Abstract: A charged particle beam, such as an electron beam or an ion beam, scans a device while a signal is applied to the device. As the particle beam scans, it locally heats the device, altering the local electrical characteristics of the device. The change in electrical characteristic is detected to and correlated to the position of the electron beam to localize a defect.

Abstract: Provided are certain 1,2,3,6-tetrahydroazepino[4,5-b]indole-5-carboxylate compounds which are useful for modulating the activity of nuclear receptors, such as farnesoid X receptors, and/or for the treatment, prevention, or amelioration diseases or disorders related to the activity of these receptors.

Abstract: Compounds of Formula I, useful as Gonadotropin Releasing Hormone (“GnRH”) (also known as Leutinizing Hormone Releasing Hormone) receptor antagonists, are disclosed.

Abstract: Disclosed are chemical entities including compounds of Formula I and pharmaceutically acceptable salts thereof, wherein X is chosen from CN, CF3, CF2H, S(O)nR8, and S(O)2N(R9)R10; Y is chosen from CR11 and N; Z is chosen from O and NH; R3 is chosen from —C(O)R12 and —C(O)N(R9)R10; and n, R1, R2 and R4-R12 are defined herein; compositions comprising one or more such chemical entities; and methods of using one or more such chemical entities for modulating the activity of certain receptors (e.g., farnesoid X) or for the treatment or prevention of one or more symptoms of disease or disorder related to the activity of those receptors.

Abstract: Disclosed are chemical entities including compounds of Formula I and pharmaceutically acceptable salts thereof, wherein X is chosen from CN, CF3, CF2H, S(O)nR6, and S(O)2N(R9)R10; Y is chosen from CR11 and N; Z is chosen from O and NH; R3 is chosen from —C(O)R12 and —C(O)N(R9)R10; and n, R1, R2 and R4-R12 are defined herein; compositions comprising one or more such chemical entities; and methods of using one or more such chemical entities for modulating the activity of certain receptors (e.g., farnesoid X) or for the treatment or prevention of one or more symptoms of disease or disorder related to the activity of those receptors.

Abstract: The present invention relates to imidazopyridine analogs, methods of making imidazopyridine analogs, compositions comprising an imidazopyridine analog, and methods for treating canonical Wnt-?-catenin cellular messaging system-related disorders comprising administering to a subject in need thereof an effective amount of an imidazopyridine analog.

Abstract: The present invention relates to naphthylpyrimidine analogs, methods of making naphthylpyrimidine analogs, compositions comprising a naphthylpyrimidine analog, and methods for treating canonical Wnt-?-catenin cellular messaging system-related disorders comprising administering to a subject in need thereof an effective amount of a naphthylpyrimidine, naphthylpyrazine and naphthylpyridazine analog.

Abstract: A method and apparatus for optimizing an integrated circuit design for post-fabrication circuit editing and diagnostics. The method and apparatus is specifically directed to adding designed-for-edit modifications and designed-for-diagnostics structures to an integrated circuit design for post-fabrication circuit editing with a charged-particle beam tool. An integrated circuit design may be modified to create efficient and reliable access to specified nodes and structures, such as spare gates, by the charged-particle beam tool during subsequent testing and debugging of the fabricated device. Additionally, structures such as spare gates, spare transistors, spare metal wires, and debug circuitry may be added to an integrated circuit design to provide for easier editing of portions of the design that may fail.

Abstract: An apparatus and method for processing an integrated circuit employing optical interference fringes. During processing, one or more wavelength lights are directed on the integrated circuit and based upon the detection of interference fringes and characteristics of the same, further processing may be controlled. One implementation involves charged particle beam processing of an integrated circuit as function of detection and/or characteristics of interference fringes. A charged particle beam trench milling operation is performed in or on the substrate of an integrated circuit. Light is directed on the floor of the trench. Interference fringes may be formed from the constructive or destructive interference between the light reflected from the floor and the light from the circuit structures. Resulting fringes will be a function, in part, of the thickness and/or profile of the trench floor. Milling may be controlled as a function of the detected fringe patterns.

Abstract: A method and apparatus for defining a circuit operation, such as a charged particle beam operation to perform a circuit edit and define a probe point. Circuit operation definition is performed in a front-end environment with access to integrated circuit computer aided design tools providing logic level and layout level information concerning the integrated circuit. The front-end environment incorporates circuit operation optimization methods to identify optimal locations for a circuit operation. A back-end environment, such as a charged particle tool computing platform, is adapted to receive one or more files, which may include a truncated layout file with circuit operation location information, for use in further defining a circuit operation and/or performing the circuit operation.

Abstract: The backside navigation method of the present invention includes milling a fiducial opening through the substrate of an integrated circuit. The milling process is stopped when the fiducial opening reaches the bottom of a trench isolation structure. The trench isolation structure delineated by the fiducial opening may be imaged and registered to a computer aided design layout image to achieve sub-micron navigation resolution.

Abstract: Apparatus and processes are disclosed for milling copper adjacent to organic low-k dielectric on a substrate by directing a charged-particle beam at a portion of the copper and exposing the copper to a precursor sufficient to enhance removal of the copper relative to removal of the dielectric, wherein the precursor contains an oxidizing agent, has a high sticking coefficient and a long residence time on the copper, contains atoms of at least one of carbon and silicon in amount sufficient to stop oxidation of the dielectric, and contains no atoms of chlorine, bromine or iodine. In one embodiment, the precursor comprises at least one of the group consisting of NitroEthanol, NitroEthane, NitroPropane, NitroMethane, compounds based on silazane such as HexaMethylCycloTriSilazane, and compounds based on siloxane such as Octa-Methyl-Cyclo-Tetra-Siloxane. Products of the processes are also disclosed.

Abstract: An apparatus and method for processing an integrated circuit employing optical interference fringes. During processing, light is directed on the integrated circuit and based upon the detection of interference fringes, further processing may be controlled. One implementation involves charged particle beam processing of an integrated circuit as function of detection of interference fringes. A charged particle beam trench milling operation is performed in or on the substrate of an integrated circuit. Light is directed on the floor of the trench. When the floor approaches the underlying circuit structures, some light is reflected from the floor of the trench and some light penetrates the substrate and is reflected off the underlying circuit structures. Interference fringes may be formed from the constructive or destructive interference between the light reflected from the floor and the light from the circuit structures. Processing may be controlled as function of the detection of interference fringes.

Abstract: Localized trenches or access holes are milled in a semiconductor substrate to define access points to structures of an integrated circuit intended for circuit editing. A conductor is deposited, such as with a focused ion beam tool, in the access holes and a localized heat is applied to the conductor for silicide formation, especially at the boundary between a semiconductor structure, such as diffusion regions, and the deposited conductor. Localized heat may be generated at the target location through precise laser application, current generation through the target location, or a combination thereof.