Abstract: A method for analyzing an integrated circuit includes: applying an electric test pattern to the IC; delivering a stream of primary electrons to a back side of the IC on an active region to a transistor of interest, the active region including active structures such as transistors of the IC; detecting light resulting from cathodoluminescence initiated by secondary electrons in the IC; and analyzing the detected light regarding a correlation with the electric test pattern applied to the IC. A system for analyzing an IC is provided.

Abstract: Method to extract timing diagrams from synchronized single- or two-photon pulsed LADA by spatially positioning the incident laser beam on circuit feature of interest, temporally scanning the arrival time of the laser pulse with respect to the tester clock or the loop length trigger signal, then recording the magnitude and sign of the resulting fail rate signature per laser pulse arrival time. A Single-Photon Laser-Assisted Device Alteration apparatus applies picosecond laser pulses of wavelength having photon energy equal to or greater than the silicon band-gap. A Two-Photon Laser-Assisted Device Alteration apparatus applies femtosecond laser pulses of wavelength having photon energy equal to or greater than half the silicon band-gap at the area of interest. The laser pulses are synchronized with test vectors so that pass/fail ratios can be altered using either the single-photon or the two-photon absorption effect. A sequence of synthetic images with error data illustrates timing sensitive locations.

Abstract: A method for analyzing an integrated circuit includes: applying an electric test pattern to the IC; delivering a stream of primary electrons to a back side of the IC on an active region to a transistor of interest, the active region including active structures such as transistors of the IC; detecting light resulting from cathodoluminescence initiated by secondary electrons in the IC; and analyzing the detected light regarding a correlation with the electric test pattern applied to the IC. A system for analyzing an IC is provided.

Abstract: Method to extract timing diagrams from synchronized single- or two-photon pulsed LADA by spatially positioning the incident laser beam on circuit feature of interest, temporally scanning the arrival time of the laser pulse with respect to the tester clock or the loop length trigger signal, then recording the magnitude and sign of the resulting fail rate signature per laser pulse arrival time. A Single-Photon Laser-Assisted Device Alteration apparatus applies picosecond laser pulses of wavelength having photon energy equal to or greater than the silicon band-gap. A Two-Photon Laser-Assisted Device Alteration apparatus applies femtosecond laser pulses of wavelength having photon energy equal to or greater than half the silicon band-gap at the area of interest. The laser pulses are synchronized with test vectors so that pass/fail ratios can be altered using either the single-photon or the two-photon absorption effect. A sequence of synthetic images with error data illustrates timing sensitive locations.

Abstract: Method to extract timing diagrams from synchronized single- or two-photon pulsed LADA by spatially positioning the incident laser beam on circuit feature of interest, temporally scanning the arrival time of the laser pulse with respect to the tester clock or the loop length trigger signal, then recording the magnitude and sign of the resulting fail rate signature per laser pulse arrival time. A Single-Photon Laser-Assisted Device Alteration apparatus applies picosecond laser pulses of wavelength having photon energy equal to or greater than the silicon band-gap. A Two-Photon Laser-Assisted Device Alteration apparatus applies femtosecond laser pulses of wavelength having photon energy equal to or greater than half the silicon band-gap at the area of interest. The laser pulses are synchronized with test vectors so that pass/fail ratios can be altered using either the single-photon or the two-photon absorption effect. A sequence of synthetic images with error data illustrates timing sensitive locations.

Abstract: A charged particle beam, such as an electron beam or an ion beam, scans a device while a signal is applied to the device. As the particle beam scans, it locally heats the device, altering the local electrical characteristics of the device. The change in electrical characteristic is detected to and correlated to the position of the electron beam to localize a defect.

Abstract: A method and apparatus for optimizing an integrated circuit design for post-fabrication circuit editing and diagnostics. The method and apparatus is specifically directed to adding designed-for-edit modifications and designed-for-diagnostics structures to an integrated circuit design for post-fabrication circuit editing with a charged-particle beam tool. An integrated circuit design may be modified to create efficient and reliable access to specified nodes and structures, such as spare gates, by the charged-particle beam tool during subsequent testing and debugging of the fabricated device. Additionally, structures such as spare gates, spare transistors, spare metal wires, and debug circuitry may be added to an integrated circuit design to provide for easier editing of portions of the design that may fail.

Abstract: An apparatus and method for processing an integrated circuit employing optical interference fringes. During processing, one or more wavelength lights are directed on the integrated circuit and based upon the detection of interference fringes and characteristics of the same, further processing may be controlled. One implementation involves charged particle beam processing of an integrated circuit as function of detection and/or characteristics of interference fringes. A charged particle beam trench milling operation is performed in or on the substrate of an integrated circuit. Light is directed on the floor of the trench. Interference fringes may be formed from the constructive or destructive interference between the light reflected from the floor and the light from the circuit structures. Resulting fringes will be a function, in part, of the thickness and/or profile of the trench floor. Milling may be controlled as a function of the detected fringe patterns.

Abstract: A method and apparatus for defining a circuit operation, such as a charged particle beam operation to perform a circuit edit and define a probe point. Circuit operation definition is performed in a front-end environment with access to integrated circuit computer aided design tools providing logic level and layout level information concerning the integrated circuit. The front-end environment incorporates circuit operation optimization methods to identify optimal locations for a circuit operation. A back-end environment, such as a charged particle tool computing platform, is adapted to receive one or more files, which may include a truncated layout file with circuit operation location information, for use in further defining a circuit operation and/or performing the circuit operation.

Abstract: The backside navigation method of the present invention includes milling a fiducial opening through the substrate of an integrated circuit. The milling process is stopped when the fiducial opening reaches the bottom of a trench isolation structure. The trench isolation structure delineated by the fiducial opening may be imaged and registered to a computer aided design layout image to achieve sub-micron navigation resolution.

Abstract: Apparatus and processes are disclosed for milling copper adjacent to organic low-k dielectric on a substrate by directing a charged-particle beam at a portion of the copper and exposing the copper to a precursor sufficient to enhance removal of the copper relative to removal of the dielectric, wherein the precursor contains an oxidizing agent, has a high sticking coefficient and a long residence time on the copper, contains atoms of at least one of carbon and silicon in amount sufficient to stop oxidation of the dielectric, and contains no atoms of chlorine, bromine or iodine. In one embodiment, the precursor comprises at least one of the group consisting of NitroEthanol, NitroEthane, NitroPropane, NitroMethane, compounds based on silazane such as HexaMethylCycloTriSilazane, and compounds based on siloxane such as Octa-Methyl-Cyclo-Tetra-Siloxane. Products of the processes are also disclosed.

Abstract: An apparatus and method for processing an integrated circuit employing optical interference fringes. During processing, light is directed on the integrated circuit and based upon the detection of interference fringes, further processing may be controlled. One implementation involves charged particle beam processing of an integrated circuit as function of detection of interference fringes. A charged particle beam trench milling operation is performed in or on the substrate of an integrated circuit. Light is directed on the floor of the trench. When the floor approaches the underlying circuit structures, some light is reflected from the floor of the trench and some light penetrates the substrate and is reflected off the underlying circuit structures. Interference fringes may be formed from the constructive or destructive interference between the light reflected from the floor and the light from the circuit structures. Processing may be controlled as function of the detection of interference fringes.

Abstract: Localized trenches or access holes are milled in a semiconductor substrate to define access points to structures of an integrated circuit intended for circuit editing. A conductor is deposited, such as with a focused ion beam tool, in the access holes and a localized heat is applied to the conductor for silicide formation, especially at the boundary between a semiconductor structure, such as diffusion regions, and the deposited conductor. Localized heat may be generated at the target location through precise laser application, current generation through the target location, or a combination thereof.

Abstract: A method for utilizing interference fringe patterns generated when milling a trench through a semiconductor substrate by a method such as FIB milling, to determine and optimize the thickness uniformity of the trench bottom. The interference fringes may be mapped and the mapping used to direct the FIB milling to those regions which are thicker to correct observed non-uniformities in the trench floor thickness by varying the pixel dwell time across the milled area. The interference fringe mapping may be used to develop computerized contour lines to automate the pixel dwell time variations as described above, for correcting non-uniformities in the trench floor thickness. The method may be applied to applications other than trench formation for backside editing, such as monitoring progress in forming a milled object.

Abstract: A charged particle guide adapted to be coupled with a charged particle detector, such as a secondary electron detector. The charged particle guide, in one example, comprising two wires extending from the charged particle detector toward a source of charged particles, such as secondary electrons emitted from an IC upon application of a focused ion beam. Upon application of a bias voltage, the charged particle guide introduces a collecting electric field that attracts charged particles and directs the charged particles to the charged particles detector.

Abstract: A system, apparatus, and method for analyzing photon emission data to discriminate between photons emitted by transistors and photons emitted by background sources. The analysis involves spatial and/or temporal correlation of photon emissions. After correlation, the analysis may further involve obtaining a likelihood that the correlated photons were emitted by a transistor. After correlation, the analysis may also further involve assigning a weight to individual photon emissions as a function of the correlation. The weight, in some instances, reflecting a likelihood that the photons were emitted by a transistor. The analysis may further involve automatically identifying transistors in a photon emission image.

Abstract: A system and method for determining precisely in-situ the endpoint of halogen-assisted charged particle beam milling of a hole or trench in the backside of the substrate of a flipchip packaged IC. The backside of the IC is mechanically thinned. Optionally, a coarse trench is then milled in the thinned backside of the IC using either laser chemical etching or halogen-assisted charged particle beam milling. A further small trench is milled using a halogen-assisted charged-particle beam (electron or ion beam). The endpoint for milling this small trench is determined precisely by monitoring the power supply leakage current of the IC induced by electron-hole pairs created by the milling process. A precise in-situ endpoint detection signal is generated by modulating the beam at a reference frequency and then amplifying that frequency component in the power supply leakage current with an amplifier, narrow-band amplifier or lock-in amplifier.

Abstract: Apparatus and processes are disclosed for milling copper adjacent to organic low-k dielectric on a substrate by directing a charged-particle beam at a portion of the copper and exposing the copper to a precursor sufficient to enhance removal of the copper relative to removal of the dielectric, wherein the precursor contains an oxidizing agent, has a high sticking coefficient and a long residence time on the copper, contains atoms of at least one of carbon and silicon in amount sufficient to stop oxidation of the dielectric, and contains no atoms of chlorine, bromine or iodine. In one embodiment, the precursor comprises at least one of the group consisting of NitroEthanol, NitroEthane, NitroPropane, NitroMethane, compounds based on silazane such as HexaMethylCycloTriSilazane, and compounds based on siloxane such as Octa-Methyl-Cyclo-Tetra-Siloxane. Products of the processes are also disclosed.

Abstract: A plurality of images, including a first image and a second image having a higher resolution than the first image, are aligned by generating an oversampled cross correlation image that corresponds to relative displacements of the first and second images, and, based on the oversampled cross correlation image, determining an offset value that corresponds to a misalignment of the first and second images. The first and second images are aligned to a precision greater than the resolution of the first image, based on the determined offset value. Enhanced results are achieved by performing another iteration of generating an oversampled cross correlation image and determining an offset value for the first and second images. Generating the oversampled cross correlation image may involve generating a cross correlation image that corresponds to relative displacements of the first and second images, and oversampling the cross correlation image to generate the oversampled cross correlation image.