Patents by Inventor Theodore Speers
Theodore Speers has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20080309371Abstract: An integrated circuit system includes a first set of integrated circuit dice each member of the set having a different configuration of input/output circuits disposed thereon and a second set of integrated circuit dice each having different logical function circuits disposed thereon. Each member of the first and second sets of integrated circuit dice include an array of face-to-face bonding pads disposed thereon that mate with the array of face-to-face bonding pads of each member of the other set.Type: ApplicationFiled: August 22, 2008Publication date: December 18, 2008Applicant: ACTEL CORPORATIONInventor: Theodore Speers
-
Publication number: 20080309393Abstract: A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A real-time clock is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A programmable logic block is coupled to the clock conditioning circuit and the real-time clock.Type: ApplicationFiled: October 31, 2007Publication date: December 18, 2008Applicant: ACTEL CORPORATIONInventors: Shin-Nan Sun, Limin Zhu, Theodore Speers, Gregory Bakker
-
Patent number: 7459772Abstract: An integrated circuit system includes a first set of integrated circuit dice each member of the set having a different configuration of input/output circuits disposed thereon and a second set of integrated circuit dice each having different logical function circuits disposed thereon. Each member of the first and second sets of integrated circuit dice include an array of face-to-face bonding pads disposed thereon that mate with the array of face-to-face bonding pads of each member of the other set.Type: GrantFiled: September 29, 2004Date of Patent: December 2, 2008Assignee: Actel CorporationInventor: Theodore Speers
-
Publication number: 20080272804Abstract: A non-volatile memory configuration scheme is disclosed for volatile-memory-based programmable circuits in a programmable integrated circuit that includes an FPGA fabric, a plurality of first configurable circuit elements external to the FPGA fabric, and a plurality of second configurable circuit elements external to the FPGA fabric. A plurality of distributed configuration non-volatile memory cells is disposed in the FPGA, each one of the distributed configuration non-volatile memory cells coupled to a different one of the plurality of first configurable circuit elements. A non-volatile memory array stores configuration information for the second configurable circuit elements. A plurality of register cells is disposed with the second configurable circuit elements and is coupleable to the non-volatile memory array, each one of the register cells coupled to a different one of the plurality of second configurable circuit elements.Type: ApplicationFiled: July 21, 2008Publication date: November 6, 2008Applicant: Actel CorporationInventor: Theodore Speers
-
Publication number: 20080272803Abstract: An integrated circuit includes a plurality of inputs, a plurality of output pads, a programmable logic block, an analog circuit block, an analog-to-digital converter programmably coupleable to individual analog circuits in the analog circuit block, and an interconnect architecture programmably coupling selected ones of the plurality of inputs, the plurality of outputs, the programmable logic block, the analog circuit block, and the analog-to-digital converter. At least one of the inputs may be programmably configured as one of a digital input programmably coupleable to elements in the programmable logic block or as an analog input to an analog circuit in the analog circuit block.Type: ApplicationFiled: July 21, 2008Publication date: November 6, 2008Applicant: Actel CorporationInventors: Rabindranath Balasubramanian, Limin Zhu, Theodore Speers, Gregory Bakker
-
Publication number: 20080224731Abstract: A programmable system-on-a-chip integrated circuit device includes a programmable logic block. A digital input/output circuit block is coupled to the programmable logic block. A SRAM block is coupled to the programmable logic block. At least one non-volatile memory block is coupled to the programmable logic block. A JTAG port is coupled to the programmable logic block. An analog circuit block including an analog-to-digital converter may be coupled to the programmable logic block and an analog input/output circuit block may be coupled to the analog circuit block.Type: ApplicationFiled: June 2, 2008Publication date: September 18, 2008Applicant: ACTEL CORPORATIONInventors: Theodore Speers, Limin Zhu, Kurt Kolkind, Gregory Bakker
-
Publication number: 20080218207Abstract: The present invention comprises a field programmable gate array that has a plurality of dedicated first-in/first-out memory logic components. The field programmable gate array includes a plurality of synchronous random access memory blocks that are coupled to a plurality of dedicated first-in/first-out memory logic components and a plurality of random access memory clusters that are programmably coupled to the plurality of dedicated first-in/first-out memory logic components and to the plurality of synchronous random access memory blocks.Type: ApplicationFiled: April 29, 2008Publication date: September 11, 2008Applicant: ACTEL CORPORATIONInventors: Daniel Elftmann, Theodore Speers, Arunangshu Kundu
-
Patent number: 7423451Abstract: An integrated circuit includes a plurality of inputs, a plurality of output pads, a programmable logic block, an analog circuit block, an analog-to-digital converter programmably coupleable to individual analog circuits in the analog circuit block, and an interconnect architecture programmably coupling selected ones of the plurality of inputs, the plurality of outputs, the programmable logic block, the analog circuit block, and the analog-to-digital converter. At least one of the inputs may be programmably configured as one of a digital input programmably coupleable to elements in the programmable logic block or as an analog input to an analog circuit in the analog circuit block.Type: GrantFiled: October 23, 2006Date of Patent: September 9, 2008Assignee: Actel CorporationInventors: Rabindranath Balasubramanian, Limin Zhu, Theodore Speers, Gregory Bakker
-
Patent number: 7414428Abstract: A non-volatile memory configuration scheme is disclosed for volatile-memory-based programmable circuits in a programmable integrated circuit that includes an FPGA fabric, a plurality of first configurable circuit elements external to the FPGA fabric, and a plurality of second configurable circuit elements external to the FPGA fabric. A plurality of distributed configuration non-volatile memory cells is disposed in the FPGA, each one of the distributed configuration non-volatile memory cells coupled to a different one of the plurality of first configurable circuit elements. A non-volatile memory array stores configuration information for the second configurable circuit elements. A plurality of register cells is disposed with the second configurable circuit elements and is coupleable to the non-volatile memory array, each one of the register cells coupled to a different one of the plurality of second configurable circuit elements.Type: GrantFiled: August 21, 2006Date of Patent: August 19, 2008Assignee: Actel CorporationInventor: Theodore Speers
-
Publication number: 20080191363Abstract: An integrated circuit system includes a first integrated circuit die and a family of second integrated circuit dice. The first integrated circuit die have input/output circuits disposed thereon and further have a first array of face-to-face bonding structures disposed on a first face thereof. Each member of the family of second integrated circuit dice have logical function circuits disposed thereon and further have a second array of face-to-face bonding structures disposed on a first face thereof. The second array of face-to-face bonding structures of each member of the family mates with a different portion of the first array of face-to-face bonding structures.Type: ApplicationFiled: April 14, 2008Publication date: August 14, 2008Applicant: ACTEL CORPORATIONInventors: William C. Plants, John McCollum, Theodore Speers
-
Patent number: 7394289Abstract: The present invention comprises a field programmable gate array that has a plurality of dedicated first-in/first-out memory logic components. The field programmable gate array includes a plurality of synchronous random access memory blocks that are coupled to a plurality of dedicated first-in/first-out memory logic components and a plurality of random access memory clusters that are programmably coupled to the plurality of dedicated first-in/first-out memory logic components and to the plurality of synchronous random access memory blocks.Type: GrantFiled: April 18, 2007Date of Patent: July 1, 2008Assignee: Actel CorporationInventors: Daniel Elftmann, Theodore Speers, Arunangshu Kundu
-
Patent number: 7385418Abstract: A programmable system-on-a-chip integrated circuit device includes a programmable logic block. A digital input/output circuit block is coupled to the programmable logic block. A SRAM block is coupled to the programmable logic block. At least one non-volatile memory block is coupled to the programmable logic block. A JTAG port is coupled to the programmable logic block. An analog circuit block including an analog-to-digital converter may be coupled to the programmable logic block and an analog input/output circuit block may be coupled to the analog circuit block.Type: GrantFiled: July 26, 2006Date of Patent: June 10, 2008Assignee: Actel CorporationInventors: Theodore Speers, Limin Zhu, Kurt Kolkind, Gregory Bakker
-
Publication number: 20080122484Abstract: An integrated circuit device has a state-saving feature and includes a programmable logic block, I/O pads, a dedicated register, at least one volatile memory block, a non-volatile memory block, a condition-sensing circuit for detecting at least one condition, A control circuit such as a state machine controls the saving of states of various volatile memories and registers to the non-volatile memory and also controls the initialization of the volatile registers and memories using the saved state data.Type: ApplicationFiled: February 8, 2008Publication date: May 29, 2008Applicant: ACTEL CORPORATIONInventors: Limin Zhu, Theodore Speers, Gregory Bakker
-
Publication number: 20080122481Abstract: A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another.Type: ApplicationFiled: October 31, 2007Publication date: May 29, 2008Applicant: ACTEL CORPORATIONInventors: Greg Bakker, Khaled El-Ayat, Theodore Speers, Limin Zhu, Brian Schubert, Rabindranath Balasubramanian, Kurt Kolkind, Thomas Barraza, Venkatesh Narayanan, John McCollum, William C. Plants
-
Patent number: 7358601Abstract: An integrated circuit system includes a first integrated circuit die and a family of second integrated circuit dice. The first integrated circuit die have input/output circuits disposed thereon and further have a first array of face-to-face bonding structures disposed on a first face thereof. Each member of the family of second integrated circuit dice have logical function circuits disposed thereon and further have a second array of face-to-face bonding structures disposed on a first face thereof. The second array of face-to-face bonding structures of each member of the family mates with a different portion of the first array of face-to-face bonding structures.Type: GrantFiled: June 29, 2005Date of Patent: April 15, 2008Assignee: Actel CorporationInventors: William C. Plants, John McCollum, Theodore Speers
-
Patent number: 7352206Abstract: An integrated circuit device has a state-saving feature and includes a programmable logic block, I/O pads, a dedicated register, at least one volatile memory block, a non-volatile memory block, a condition-sensing circuit for detecting at least one condition, A control circuit such as a state machine controls the saving of states of various volatile memories and registers to the non-volatile memory and also controls the initialization of the volatile registers and memories using the saved state data.Type: GrantFiled: May 28, 2004Date of Patent: April 1, 2008Assignee: Actel CorporationInventors: Limin Zhu, Theodore Speers, Gregory Bakker
-
Publication number: 20080048717Abstract: A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another.Type: ApplicationFiled: October 31, 2007Publication date: February 28, 2008Applicant: ACTEL CORPORATIONInventors: Greg Bakker, Khaled El-Ayat, Theodore Speers, Limin Zhu, Brian Schubert, Rabindranath Balasubramanian, Kurt Kolkind, Thomas Barraza, Venkatesh Narayanan, John McCollum, William Plants
-
Publication number: 20080030235Abstract: A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A real-time clock is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A programmable logic block is coupled to the clock conditioning circuit and the real-time clock.Type: ApplicationFiled: October 12, 2007Publication date: February 7, 2008Applicant: ACTEL CORPORATIONInventors: Shin-Nan Sun, Limin Zhu, Theodore Speers, Gregory Bakker
-
Patent number: 7298178Abstract: A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A real-time clock is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A programmable logic block is coupled to the clock conditioning circuit and the real-time clock.Type: GrantFiled: June 29, 2006Date of Patent: November 20, 2007Assignee: Actel CorporationInventors: Shin-Nan Sun, Limin Zhu, Theodore Speers, Gregory Bakker
-
Patent number: 7280058Abstract: A programmable analog circuit includes a plurality of analog inputs, a differential analog buffer, a digital-to-analog converter, an analog-to-digital converter, and an operational amplifier having an inverting input and a non-inverting input. An analog switching network is coupled between the plurality of analog inputs, the differential analog buffer, the digital-to-analog converter, the analog-to-digital converter, and the operational amplifier and is configured to allow programmable connections from any of the plurality of analog inputs, the differential analog buffer, and the digital-to-analog converter to the inverting input and a non-inverting input; of the operational amplifier. An array of programmable logic is programmably coupled to the input to the digital-to-analog converter and the output of the analog-to-digital converter.Type: GrantFiled: August 18, 2006Date of Patent: October 9, 2007Assignee: Actel CorporationInventors: Limin Zhu, Theodore Speers