Patents by Inventor Theodore Willke
Theodore Willke has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12711088Abstract: Examples include techniques to utilize near memory compute circuitry for memory-bound workloads. Examples include the near memory compute circuitry being resident on an input/output (I/O) arranged to couple with a plurality of memory devices configured as a memory pool that is accessible to a host central processing unit (CPU) through the I/O switch. The near memory compute circuitry may receive a request to obtain data from the memory pool and generate a result that is made available to the host CPU to facilitate acceleration of a memory-bound workload.Type: GrantFiled: March 30, 2022Date of Patent: August 18, 2026Assignee: Intel CorporationInventors: Somnath Paul, Muhammad M. Khellah, Nilesh Jain, Gopi Krishna Jha, Ravishankar Iyer, Theodore Willke, Mariano Tepper, Maria Cecilia Aguerrebere Otegui, Nagabhushan Chitlur, Suresh Thirumandas, Ananthan Ayyasamy, Sujoy Sen, Xiao Hu
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Patent number: 12535972Abstract: Binary sparse encoding of data can be used to reduce an amount of data read from the stochastic associative memory while processing a query. Read performance of the stochastic associated memory is optimized to enhance the query throughput by modifying access patterns to reduce the time to read the stochastic associated memory. Read performance of the stochastic associative memory can be further improved through the use of cluster aware sharding and replication for parallelized similarity search. Clusters are partitioned across multiple Dual In-line Memory Modules (DIMMs), each DIMM including stochastic associative memory, to achieve maximum latency advantage.Type: GrantFiled: June 25, 2021Date of Patent: January 27, 2026Assignee: Intel CorporationInventors: Sourabh Dongaonkar, Jawad B. Khan, Chetan Chauhan, Dipanjan Sengupta, Mariano Tepper, Theodore Willke
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Publication number: 20250156356Abstract: Examples include techniques to utilize near memory compute circuitry for memory-bound workloads. Examples include the near memory compute circuitry being resident on an input/output (I/O) arranged to couple with a plurality of memory devices configured as a memory pool that is accessible to a host central processing unit (CPU) through the I/O switch. The near memory compute circuitry may receive a request to obtain data from the memory pool and generate a result that is made available to the host CPU to facilitate acceleration of a memory-bound workload.Type: ApplicationFiled: March 30, 2022Publication date: May 15, 2025Inventors: Somnath PAUL, Muhammad M. KHELLAH, Nilesh JAIN, Gopi Krishna JHA, Ravishankar IYER, Theodore WILLKE, Mariano TEPPER, Maria Cecilia AGUERREBERE OTEGUI, Nagabhushan CHITLUR, Suresh THIRUMANDAS, Ananthan AYYASAMY, Sujoy SEN, Xiao HU
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Publication number: 20240427596Abstract: Systems, apparatuses and methods may provide for technology that conducts, in accordance with a first instruction, a load of a block of data into a register, wherein the block of data is to include a plurality of lanes, conducts, in accordance with a second instruction, a first bitwise mask application to each lane in the plurality of lanes, and extracts a set of vector dimensions from the block of data based on the first bitwise mask application.Type: ApplicationFiled: August 12, 2024Publication date: December 26, 2024Inventors: Mark Hildebrand, Mariano Tepper, Maria Cecilia Aguerrebere Otegui, Ishwar Singh Bhati, Theodore Willke
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Publication number: 20240419674Abstract: Technology as described herein provides for accessing input vectors and a query vector, the input vectors each having a dimensionality, the query vector associated with a query and having a dimensionality, applying a first vector transformation to the input vectors to generate primary vectors, each of the primary vectors having a dimensionality smaller than the dimensionality associated with the input vectors, applying a second vector transformation to the query vector to generate a modified query vector, the modified query vector having a dimensionality smaller than the dimensionality of the query vector, and conducting a similarity search on the primary vectors based on the modified query vector to generate one or more candidates for the query. In embodiments a first component of the first vector transformation is determined based on an algorithm and a second component of the second vector transformation is determined based on the same algorithm.Type: ApplicationFiled: August 30, 2024Publication date: December 19, 2024Inventors: Mariano Tepper, Ishwar Singh Bhati, Maria Cecilia Aguerrebere Otegui, Mark Hildebrand, Theodore Willke
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Publication number: 20240394310Abstract: Systems, apparatuses and methods may provide for technology that determines a plurality of means based on a plurality of vectors, wherein each mean in the plurality of means corresponds to center of a cluster, assigns each vector in a plurality of vectors to a mean in the plurality of means, and conducts a compression of the plurality of vectors based on the plurality of means. The technology may also build a directed graph based on the compressed plurality of vectors and update the directed graph. Updating the graph may involve determining a plurality of modified means, detecting that a change in one or more modified means in the plurality of modified means exceeds a threshold, conducting an update of the modified mean(s), and bypassing the update for one or more remaining means in the plurality of modified means.Type: ApplicationFiled: August 8, 2024Publication date: November 28, 2024Inventors: Maria Cecilia Aguerrebere Otegui, Ishwar Singh Bhati, Mark Hildebrand, Mariano Tepper, Theodore Willke
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Patent number: 11989553Abstract: Technologies for performing random sparse lifting and Procrustean orthogonal sparse hashing using column read-enabled memory include a device that has a memory that is column addressable and circuitry connected to the memory. The circuitry is configured to add a set of input data vectors to the memory as a set of binary dimensionally expanded vectors, including multiplying each input data vector with a projection matrix. The circuitry is also configured to produce a search hash code from a search data vector, including multiplying the search data vector with the projection matrix. Further, the circuitry is configured to determine a Hamming distance between the search hash code and each of the binary dimensionally expanded vectors.Type: GrantFiled: May 6, 2020Date of Patent: May 21, 2024Assignee: Intel CorporationInventors: Mariano Tepper, Dipanjan Sengupta, Sourabh Dongaonkar, Chetan Chauhan, Jawad Khan, Theodore Willke, Richard Coulson
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Publication number: 20240020308Abstract: Systems, apparatuses and methods may provide for technology that conducts a traversal of a directed graph in response to a query, retrieves the plurality of vectors from a dynamic random access memory (DRAM) in accordance with the traversal of the directed graphs, wherein each vector in the plurality of vectors is compressed, decompresses the plurality of vectors, determines a similarity between the query and the decompressed plurality of vectors, and generates a response to the query based on the similarity between the query and the decompressed plurality of vectors.Type: ApplicationFiled: August 3, 2023Publication date: January 18, 2024Inventors: Maria Cecilia Aguerrebere Otegui, Ishwar Bhati, Mark Hildebrand, Mariano Tepper, Theodore Willke
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Patent number: 11829376Abstract: Technologies for refining stochastic similarity search candidates include a device having a memory that is column addressable and circuitry connected to the memory. The circuitry is configured to add a set of input data vectors to the memory as a set of binary dimensionally expanded vectors, including multiplying each input data vector with a projection matrix. The circuitry is also configured to produce a search hash code from a search data vector, including multiplying the search data vector with the projection matrix. Additionally, the circuitry is configured to identify a result set of the binary dimensionally expanded vectors as a function of a Hamming distance of each binary dimensionally expanded vector from the search hash code and determine, from the result set, a refined result set as a function of a similarity measure in an original input space of the input data vectors.Type: GrantFiled: May 6, 2020Date of Patent: November 28, 2023Assignee: Intel CorporationInventors: Mariano Tepper, Dipanjan Sengupta, Jawad Khan, Sourabh Dongaonkar, Chetan Chauhan, Richard Coulson, Theodore Willke
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Publication number: 20230305709Abstract: Methods, apparatus, systems, and articles of manufacture are disclosed to facilitate improved use of stochastic associative memory. Example instructions cause at least one processor to: generate a hash code for data to be stored in a stochastic associative memory (SAM); compare the hash code with centroids of clusters of data stored in the SAM; select a first one of the clusters corresponding to a first one of the centroids that is closest to the hash code; determine whether a selected number of hash codes stored in the SAM exceeds a threshold; in response to the selected number exceeding the threshold: query a controller for sizes of the clusters; and determine, based on the query, that a second one of the clusters includes an unbalanced size; and select a third one of the clusters to associate with a second number of hash codes corresponding to the second one of the clusters.Type: ApplicationFiled: September 15, 2020Publication date: September 28, 2023Inventors: Dipanjan Sengupta, Mariano Tepper, Sourabh Dongaonkar, Chetan Chauhan, Jawad Khan, Theodore Willke, Richard Coulson
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Patent number: 11640295Abstract: Systems, apparatuses and methods may provide for technology that generates a dependence graph based on a plurality of intermediate representation (IR) code instructions associated with a compiled program code, generates a set of graph embedding vectors based on the plurality of IR code instructions, and determines, via a neural network, one of an analysis of the compiled program code or an enhancement of the program code based on the dependence graph and the set of graph embedding vectors. The technology may provide a graph attention neural network that includes a recurrent block and at least one task-specific neural network layer, the recurrent block including a graph attention layer and a transition function. The technology may also apply dynamic per-position recurrence-halting to determine a number of recurring steps for each position in the recurrent block based on adaptive computation time.Type: GrantFiled: June 26, 2020Date of Patent: May 2, 2023Assignee: Intel CorporationInventors: Mariano Tepper, Bryn Keller, Mihai Capota, Vy Vo, Nesreen Ahmed, Theodore Willke
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Patent number: 11604834Abstract: Technologies for performing stochastic similarity searches in an online clustering space include a device having a column addressable memory and circuitry. The circuitry is configured to determine a Hamming distance from a binary dimensionally expanded vector to each cluster of a set of clusters of binary dimensionally expanded vectors in the memory, identify the cluster having the smallest Hamming distance from the binary dimensionally expanded vector, determine whether the identified cluster satisfies a target size, and add or delete, in response to a determination that the identified cluster does not satisfy the target size, the binary dimensionally expanded vector to or from the identified cluster.Type: GrantFiled: May 8, 2020Date of Patent: March 14, 2023Assignee: Intel CorporationInventors: Mariano Tepper, Dipanjan Sengupta, Sourabh Dongaonkar, Chetan Chauhan, Jawad Khan, Theodore Willke, Richard Coulson, Rajesh Sundaram
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Patent number: 11574172Abstract: Technologies for efficiently performing memory augmented neural network (MANN) update operations includes a device with circuitry configured to obtain a key usable to search a memory associated with a memory augmented neural network for one or more data sets. The circuitry is also configured to perform a stochastic associative search to identify a group of data sets within the memory that satisfy the key and write to the identified group of data sets concurrently to update the memory augmented neural network.Type: GrantFiled: March 22, 2019Date of Patent: February 7, 2023Assignee: Intel CorporationInventors: Dipanjan Sengupta, Jawad B. Khan, Theodore Willke, Richard Coulson
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Patent number: 11507773Abstract: Systems, apparatuses and methods may store a plurality of classes that represent a plurality of clusters in a cache. Each of the classes represents a group of the plurality of clusters and the plurality of clusters is in a first data format. The systems, apparatuses and methods further modify input data from a second data format to the first data format and conduct a similarity search based on the input data in the first data format to assign the input data to at least one class of the classes.Type: GrantFiled: June 27, 2020Date of Patent: November 22, 2022Assignee: Intel CorporationInventors: Mariano Tepper, Dipanjan Sengupta, Theodore Willke, Javier Sebastian Turek
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Patent number: 11500887Abstract: Technologies for tuning performance and/or accuracy of similarity search using stochastic associative memories (SAM). Under a first subsampling approach, columns associated with set bits in a search key comprising a binary bit vector are subsampled. Matching set bits for the subsampled columns are aggregated on a row-wise basis to generate similarity scores, which are then ranked. A similar scheme is applied for all the columns with set bits in the search key and the results for top ranked rows are compared to evaluate a tradeoff between throughput boost versus lost accuracy. A second approach called continuous column read, and iterative approach is employed that continuously scores the rows as each new column read is complete. The similarity scores for an N-1 and Nth-1 iteration are ranked, a rank correlation is calculated, and a determination is made to whether the rank correlation meets or exceeds a threshold.Type: GrantFiled: April 9, 2021Date of Patent: November 15, 2022Assignee: Intel CorporationInventors: Sourabh Dongaonkar, Jawad B. Khan, Chetan Chauhan, Dipanjan Sengupta, Mariano Tepper, Theodore Willke, Richard L. Coulson
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Publication number: 20210318805Abstract: Binary sparse encoding of data can be used to reduce an amount of data read from the stochastic associative memory while processing a query. Read performance of the stochastic associated memory is optimized to enhance the query throughput by modifying access patterns to reduce the time to read the stochastic associated memory. Read performance of the stochastic associative memory can be further improved through the use of cluster aware sharding and replication for parallelized similarity search. Clusters are partitioned across multiple Dual In-line Memory Modules (DIMMs), each DIMM including stochastic associative memory, to achieve maximum latency advantage.Type: ApplicationFiled: June 25, 2021Publication date: October 14, 2021Inventors: Sourabh DONGAONKAR, Jawad B. KHAN, Chetan CHAUHAN, Dipanjan SENGUPTA, Mariano TEPPER, Theodore WILLKE
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Publication number: 20210224267Abstract: Technologies for tuning performance and/or accuracy of similarity search using stochastic associative memories (SAM). Under a first subsampling approach, columns associated with set bits in a search key comprising a binary bit vector are subsampled. Matching set bits for the subsampled columns are aggregated on a row-wise basis to generate similarity scores, which are then ranked. A similar scheme is applied for all the columns with set bits in the search key and the results for top ranked rows are compared to evaluate a tradeoff between throughput boost versus lost accuracy. A second approach called continuous column read, and iterative approach is employed that continuously scores the rows as each new column read is complete. The similarity scores for an N-1 and Nth-1 iteration are ranked, a rank correlation is calculated, and a determination is made to whether the rank correlation meets or exceeds a threshold.Type: ApplicationFiled: April 9, 2021Publication date: July 22, 2021Inventors: Sourabh DONGAONKAR, Jawad B. KHAN, Chetan CHAUHAN, Dipanjan SENGUPTA, Mariano TEPPER, Theodore WILLKE, Richard L. COULSON
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Publication number: 20200326934Abstract: Systems, apparatuses and methods may provide for technology that generates a dependence graph based on a plurality of intermediate representation (IR) code instructions associated with a compiled program code, generates a set of graph embedding vectors based on the plurality of IR code instructions, and determines, via a neural network, one of an analysis of the compiled program code or an enhancement of the program code based on the dependence graph and the set of graph embedding vectors. The technology may provide a graph attention neural network that includes a recurrent block and at least one task-specific neural network layer, the recurrent block including a graph attention layer and a transition function. The technology may also apply dynamic per-position recurrence-halting to determine a number of recurring steps for each position in the recurrent block based on adaptive computation time.Type: ApplicationFiled: June 26, 2020Publication date: October 15, 2020Inventors: Mariano Tepper, Bryn Keller, Mihai Capota, Vy Vo, Nesreen Ahmed, Theodore Willke
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Publication number: 20200327118Abstract: Systems, apparatuses and methods may provide for technology that identifies a query code, translates the query code into a query graph, generates a candidate vector based on a candidate graph, wherein the candidate graph is associated with a candidate code, generates a query vector based on the query graph, and determines a similarity measurement between the query vector and the candidate vector.Type: ApplicationFiled: June 27, 2020Publication date: October 15, 2020Inventors: Nesreen K. Ahmed, Dipanjan Sengupta, Todd Anderson, Theodore Willke
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Publication number: 20200327365Abstract: Systems, apparatuses and methods may store a plurality of classes that represent a plurality of clusters in a cache. Each of the classes represents a group of the plurality of clusters and the plurality of clusters is in a first data format. The systems, apparatuses and methods further modify input data from a second data format to the first data format and conduct a similarity search based on the input data in the first data format to assign the input data to at least one class of the classes.Type: ApplicationFiled: June 27, 2020Publication date: October 15, 2020Inventors: Mariano Tepper, Dipanjan Sengupta, Theodore Willke, Javier Sebastian Turek