Abstract: A demodulator arrangement including a phase-locked loop PLL (11) having an output (17) coupled to an input (23) of a hold circuit (24) also includes detection means (27) for detecting an instantaneous interference (FIG. 4b) in the signal present at the input (10) of the PLL (11) and for subsequently generating a control signal (FIG. 4e) which is applied to a control input (29) of the hold circuit. The hold circuit is adapted to retain the signal applied to its input (23) during the time interval (T.sub.3) when the control signal is presented to its control input (27). The detection means (27) are adapted to determine a phase-lock error between the signal at the input of the PLL (11) and the signal at the output (20) of a voltage-controlled oscillator VCO (19) associated with the PLL (11) and to generate the control signal if the phase-lock error exceeds a given value, for example, 45.degree..

Abstract: A data processing system comprising a memory receives data in the form of data blocks. Such a data block contains at least one data word and check bits. On the basis of the check bits it is vertified whether the data block contains reliable or unreliable data words. The unreliable data words are not written into the memory but are replaced by an unreliability indicator which is written into the memory at the address reserved for the unreliable dataword in question.

Abstract: Apparatus for quickly sorting a succession of data words on the basis of the value of a specific parameter associated with each data word has a memory divided into M blocks of N storage locations each. A counting device includes a counter for each block, the content of each counter addressing the locations within the corresponding block. During a write operation an input data word and associated parameter are applied to an input, and the value of the parameter is used as a block address; prior to this happening the count in the counter associated with the relevant block is incremented by one. Also present is a priority determining device which, during a read operation, addresses, under the control of all counts in the counting device which indicate a number of data words other than zero in the relevant block, the block of highest priority thereamong, the locations in this block again being addressed by the corresponding counter.