Abstract: The disclosure describes a form of packaging for an electronic device and a method of achieving it in order to overcome the problem of damage because of cycles in environmental temperature.A thin, flexible foil functioning as a carrier of electrically conductive material selected from the group including Invar, copper-Invar-copper and Kovar is coated with a preselected polyimide, on which is formed a thin metallized coating of chromium, in the order to 200 Angstroms, and copper, in the order of 80,000 Angstroms.A predetermined electrical circuit is formed out of this metallized coating by a photolithographic process and is connected electrically to the flexible metal foil by vias through the polyimide coating. At least one electronic device is bonded to the electrical circuit at a predetermined location to operate functionally with the circuit, and both the device and the circuit are connected electrically by the vias to the thin, metal carrier which functions as a power plane for the package.

Abstract: The disclosure describes a form of packaging for an electronic device and a method of achieving it in order to overcome the problem of damage because of cycles in environmental temperature.A thin, flexible foil functioning as a carrier of electrically conductive material selected from the group including Invar, copper-Invar-copper and Kovar is coated with a preselected polyimide, on which is formed a thin metallized coating of chromium, in the order of 200 Angstroms, and copper, in the order of 80,000 Angstroms.A predetermined electrical circuit is formed out of this metallized coating by a photolithographic process and is connected electrically to the flexible metal foil by vias through the polyimide coating. At least one electronic device is bonded to the electrical circuit at a predetermined location to operate functionally with the circuit, and both the device and the circuit are connected electrically by the vias to the thin, metal carrier which functions as a power plane for the package.

Abstract: A method for making flush circuit laminates for use in constructing a multilayer circuit board is disclosed. The method comprises laminating together a dielectric sheet(s) of material, such as glass cloth impregnated with epoxy resin, placed between predrilled or pre-punched sheets of a conductive material, such as copper, to form the desired flush circuit laminate, such as a flush surface power core, which, in turn, may be used with other laminates to construct the desired multilayer circuit board. This method allows thinner laminates to be made with acceptable dimensional tolerances which provides improved impedance characteristics compared to laminates made using conventional processes. Thus, the method provide a method of making a more compact, higher speed multilayer circuit board without sacrificing circuit density on the circuit board. If desired, the method may be carried out using all dry processes.

Abstract: At least two conductors are electrically connected through a dielectric material by providing a dielectric material having a first conductor on a first surface thereof and a temporary support layer covering the first conductor and the first surface of the dielectric material.A second surface on the dielectric material opposite the first surface is provided with a second conductor and a temporary support layer covering the second conductor and second surface of the dielectric material.Interstitial through-holes are provided to connect the first and second conductors. The through-holes are plated with an electrical conductor to thereby electrically connect the first and second conductors. The support layers are then mechanically removed such as by peeling to thereby provide a landless electrical connection between the first and second electrical conductors.

Abstract: A laminate for a laminated multilayer circuit board incorporates as a constituent member the plating layer from a peel-apart temporary base used in the fabrication of the laminate. The layer, with its one surface superimposed on the base, has additively plated to its opposite surface individual conductors and is subsequently personalized in register with the pattern of the plated conductor circuitry. The personalized layer and the plated conductors are embedded in a dielectric layer, the superimposed surface being flush mounted in the dielectric layer. The base has a rough-like surface profile characteristic that imparts at least a conformal surface profile characteristic in the superimposed surface of the plating layer which in turn provides improved adherence of this superimposed flush mounted surface, when subsequently exposed by the removal of the peel-apart base, to another dielectric layer thereafter laminated to the embedding dielectric layer to inhibit delamination between the two dielectric layers.

Abstract: A multi-layered printed circuit board is disclosed having a plurality of circuitized laminations therein. The laminates are fabricated or secured by curing layers of glass cloth which have been impregnated with heat curable resins at temperatures in excess of their glass transition temperature, the point at which such material begins to distort.Those laminations which will see at least one further curing cycle, after having themselves been cured, are formed from glass cloth impregnated heat curable resin combinations having a glass transition temperature which is significantly higher than that of the heat curable materials employed to form the subsequently and singly cured laminations. In this manner, lamination shift or distortion is appreciably reduced since those laminations which undergo a plurality of "curing" cycles, only experience one excursion beyond their transition temperature. Thus, registration mismatch between any of the circuitized laminates will not exceed acceptable levels.

Abstract: A cleaning process for high aspect ratio through holes of multilayer printed circuit boards assures the removal of any loosened fiberous material or epoxy smears in the through holes and also provides an inverted "T" structure at the innerplanes of the internal conductive circuits within the printed circuit board sandwich. The inverted "T" structure helps to move the contact point between the plating of the through hole and the internal circuit lines further into the circuit board, thereby eliminating the "Z" stress at the edge of the innerplane.