Patents by Inventor Thiam Sin Lai

Thiam Sin Lai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8887016
    Abstract: An integrated circuit (IC) is provided. The IC includes a transceiver, a boundary scan chain and a plurality of routable pathways. The transceiver includes an interconnection coupling circuit components. The transceiver receives data and transfers the received data through the interconnection. The received data is utilized to test the interconnection between the circuit components. The transceiver deserializes the data once the data completes its propagation through the interconnection. The boundary scan chain receives and shifts the deserialized data from the transceiver and transfers the shifted deserialized data out of the IC. The shifting is performed when asserted with an instruction of an Input Output (IO) standard. The plurality of routable pathways provides a pathway between the transceiver and the boundary scan chain so that the deserialized data may propagate.
    Type: Grant
    Filed: February 13, 2012
    Date of Patent: November 11, 2014
    Assignee: Altera Corporation
    Inventors: Thiam Sin Lai, Siew Leong Lam
  • Patent number: 8295421
    Abstract: Integrated circuits with data communications circuitry are provided. The data communications circuitry on an integrated circuit may receive data that was transmitted from another integrated circuit at a data rate. The data communications circuitry may include oversampling circuitry that oversamples the data to produce an oversampled version of the data at an oversampled data rate. Downsampling circuitry in the data communications circuitry may be used to downsample the oversampled data. The downsampling circuitry may include cascaded groups of registers that store the oversampled data. The outputs of each of the groups of registers may be combined to form a combined parallel output. A downsampling control circuit may have a multiplexer that selects a subset of the signals from the combined parallel output in response to control signals from a transition detector. A middle bit detector may extract a bit value from the selected subset to use as the downsampled output.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: October 23, 2012
    Assignee: Altera Corporation
    Inventors: Thiam Sin Lai, Siew Leong Lam