Abstract: A method, system, and article provide image processing with power reduction while using universal serial bus cameras.

Abstract: An embodiment of an integrated circuit may comprise a circuit block and a power management circuit coupled to the circuit block to manage two or more power states for the circuit block and to manage a request for the circuit block to enter a requested power state of the two or more power states, set a watchdog timer in response to the request, and monitor the watchdog timer and a transition of the circuit block from a current power state to the requested power state. Other embodiments are disclosed and claimed.

Abstract: A processor is disclosed and includes at least one core including a first core, and interrupt delay logic. The interrupt delay logic is to receive a first interrupt at a first time and delay the first interrupt from being processed by a first time delay that begins at the first time, unless the first interrupt is pending at a second time when a second interrupt is processed by the first core. If the first interrupt is pending at the second time, the interrupt delay logic is to indicate to the first core to begin to process the first interrupt prior to completion of the first time delay. Other embodiments are disclosed and claimed.

Abstract: Systems and methods for employing hardware-assisted virtualization for implementing a secure video output path. An example processing system comprises: a memory; a shared interconnect; and a processing core communicatively coupled to the memory via the shared interconnect, the processing core to: initialize a first virtual machine and a second virtual machine; responsive to receiving a memory access transaction initiated by the first virtual machine to access a memory buffer, tag the memory access transaction with an identifier of the first virtual machine; and responsive to receiving a digital content decoder access transaction initiated by the second virtual machine, tag the digital decoder access transaction with an identifier of the second virtual machine.

Abstract: A processor is disclosed and includes at least one core including a first core, and interrupt delay logic. The interrupt delay logic is to receive a first interrupt at a first time and delay the first interrupt from being processed by a first time delay that begins at the first time, unless the first interrupt is pending at a second time when a second interrupt is processed by the first core. If the first interrupt is pending at the second time, the interrupt delay logic is to indicate to the first core to begin to process the first interrupt prior to completion of the first time delay. Other embodiments are disclosed and claimed.

Abstract: Systems and methods for employing hardware-assisted virtualization for implementing a secure video output path. An example processing system comprises: a memory; a shared interconnect; and a processing core communicatively coupled to the memory via the shared interconnect, the processing core to: initialize a first virtual machine and a second virtual machine; responsive to receiving a memory access transaction initiated by the first virtual machine to access a memory buffer, tag the memory access transaction with an identifier of the first virtual machine; and responsive to receiving a digital content decoder access transaction initiated by the second virtual machine, tag the digital decoder access transaction with an identifier of the second virtual machine.

Abstract: A processing system includes an interconnect and a processing core, coupled to the interconnect, to execute a plurality of virtual machines each being identified by a respective identifier, and tag, by an identifier of the first virtual machine, a first transaction initiated by a first virtual machine to access the interconnect.

Abstract: A method for executing an agent code, wherein the agent code is saved in a read only memory, wherein an agent record containing data is saved in an erasable and programmable memory device, and wherein the method comprises the following steps: reading the agent code from the read only memory and loading it into a processing device, executing the agent code, thereby initiating reading the agent record from the erasable and programmable memory device and loading it into the processing device, and executing the agent record in the processing device.

Abstract: A clock synchronization circuit for generating an output clock signal that is in synchronization with a reference clock signal and a method embodying the principle of operation of the circuit are disclosed. The circuit has a programmable delay element and a phase detector. Synchronization is reached when the phase difference between the two clock signals is less than a predetermined value. The programmable delay element is coupled to the reference clock signal for introducing an adjustable delay in the reference clock signal to produce the output clock signal. By increasing the adjustable delay, the output clock signal becomes increasingly closer to being in synchronization with the reference clock signal. The phase detector is coupled to the reference clock signal and the output clock signal for detecting the phase difference between the two clock signals. The adjustable delay is increased until synchronization is obtained.

Abstract: A method for user processes, each having a unique user identification code, to intercommunicate within a communication management system even if one of the user processes is unavailable, comprises the following steps: associating an agent process with a particular user identification code in order to correspond to a user process having the particular user identification code; determining whether the user process is available in the communication management system; causing the agent process to log into the communication management system with the particular user identification code when the user process is unavailable; and enabling the agent process to intercommunicate with user processes within the communication management system instead of the unavailable user process by using the particular user identification code of the unavailable user process.

Abstract: A method for executing an agent code, wherein the agent code is saved in a read only memory, wherein an agent record containing data is saved in an erasable and programmable memory device, and wherein the method comprises the following steps: reading the agent code from the read only memory and loading it into a processing device, executing the agent code, thereby initiating reading the agent record from the erasable and programmable memory device and loading it into the processing device, and executing the agent record in the processing device.

Abstract: A computer-based method is provided for auto-determination of connection type between a Personal Digital Assistant (PDA) and a desktop computer. Current common connection types include serial, USB and infrared. The present invention uses an assertion signal such as a Clear To Send (CTS) signal to distinguish serial connection. With the present invention, the user does not need to set connection type manually. Instead, when the PDA is docked or connected, determination of connection type and synchronization of data follow without user intervention.

Abstract: A method for user processes, each having a unique user identification code, to intercommunicate within a communication management system even if one of the user processes is unavailable, comprises the following steps: associating an agent process with a particular user identification code in order to correspond to a user process having the particular user identification code; determining whether the user process is available in the communication management system; causing the agent process to log into the communication management system with the particular user identification code when the user process is unavailable; and enabling the agent process to intercommunicate with user processes within the communication management system instead of the unavailable user process by using the particular user identification code of the unavailable user process.