Abstract: A structure for an RF device provided with a semiconductor region coated with a heterogeneous dielectric region, the heterogeneous dielectric region including, in at least one first direction parallel to a main plane of the substrate, an alternation of first areas made of a first dielectric material with positive fixed charges and of second dielectric areas made of a second dielectric material with negative fixed charge in order to create an alternation of polarity allowing preventing the formation of a parasitic conduction layer in the semiconductor region.

Abstract: A method for manufacturing an integrated circuit, includes providing a stack including a substrate and a dielectric layer disposed on the substrate, the substrate being formed from a semiconductor material having a resistivity greater than or equal to 500 ?.cm, etching trenches extending through the dielectric layer and opening onto the substrate; etching the substrate isotropically and selectively with respect to the dielectric layer to form first cavities in the substrate; depositing a mobile electrical charge-trapping layer on the walls of the first cavities and on the side walls of the trenches so as to fill in the trenches in the dielectric layer, thus closing the first cavities in the substrate; and forming passive components vertically with respect to the first cavities.

Abstract: Making a semiconductor-on-insulator substrate provided with an eddy current blocking structure (20) formed in a segment (22) doped according to doping of a first type, of doped regions (23) periodically distributed on one or more parallel rows and according to a pattern (M2) and an improved arrangement.

Abstract: Making a semiconductor-on-insulator substrate provided with an eddy current blocking structure (20) formed in a segment (22) doped according to doping of a first type, of doped regions (23) periodically distributed on one or more parallel rows and according to a pattern (M2) and an improved arrangement.