Patents by Inventor Thierry Michel Sicard

Thierry Michel Sicard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5929478
    Abstract: A single level gate NVM device (20) includes a floating gate FET (11) and a capacitor (12) fabricated in two P-wells (27, 28) formed in an N-epitaxial layer (22) on a P-substrate (21). P+ sinkers (29, 31) and N-type buried layers (25, 26) provide isolation between the two P-wells (27, 28). The NVM device (20) is programmed or erased by biasing the FET (11) and the capacitor (12) to move charge carriers onto or away from a conductive layer (36) which serves as a floating gate (14) of the FET (11). Data is read from the NVM device (20) by sensing a current flowing in the FET (11) while applying a reading voltage to the capacitor (12).
    Type: Grant
    Filed: July 2, 1997
    Date of Patent: July 27, 1999
    Assignee: Motorola, Inc.
    Inventors: Patrice Michael Parris, Yee-Chaung See, Irenee M. Pages, Juan Buxo, Eric Scott Carman, Thierry Michel Sicard, Quang Xuan Nguyen