Patents by Inventor Thirunavukkarasu Ranganathan

Thirunavukkarasu Ranganathan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • STRUCTURE WITH GATE OVER NON-ALIGNED SEMICONDUCTOR REGIONS
    Publication number: 20250079343
    Abstract: Embodiments of the disclosure provide a structure and related method for a gate over semiconductor regions that are not aligned. Structures according to the disclosure include a first semiconductor region extending from a first widthwise end to a second widthwise end within a substrate. A second semiconductor region is adjacent the first semiconductor region and extends from a first widthwise end to a second widthwise end within the substrate. The second widthwise end of the second semiconductor region is non-aligned with the second widthwise end of the first semiconductor region. A gate structure is over the substrate and extends widthwise over the first semiconductor region and the second semiconductor region.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 6, 2025
    Inventors: David Charles Pritchard, Ramesh Raghavan, Thirunavukkarasu Ranganathan, Rajesh Reddy Tummuru, Benoit Francois Claude Ramadout, Luca Pirro
  • Power estimation of a transmission
    Patent number: 7643803
    Abstract: Embodiments of power estimation of a transmission are presented herein.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: January 5, 2010
    Assignee: Intel Corporation
    Inventors: Thirunavukkarasu Ranganathan, Mohamed I Iqbal, Vijayakumaran V Nair
  • Power estimation of a transmission
    Publication number: 20070004349
    Abstract: Embodiments of power estimation of a transmission are presented herein.
    Type: Application
    Filed: June 29, 2005
    Publication date: January 4, 2007
    Inventors: Thirunavukkarasu Ranganathan, Mohamed Iqbal, Vijayakumaran Nair