Patents by Inventor Thomas A. Everett

Thomas A. Everett has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240164697
    Abstract: A system for detecting autonomic dysreflexia (AD) may measure skin nerve activity (skNA), galvanic skin response (GSR), heart rate, and skin temperature of a subject. The system may extract, a plurality of features from the measurements. The features may include medianNN, average iskNA, number of bursts, RMSSD, pNN5, or a combination thereof. The system may classify, based on a machine learning model, the plurality of features to identify the onset of AD in the subject. The system may output, in response to the onset of AD, a message indicative of the onset of AD.
    Type: Application
    Filed: August 10, 2023
    Publication date: May 23, 2024
    Applicant: Purdue Research Foundation
    Inventors: Brad S Duerstock, Shruthi Suresh, Ana Karina Kirby, Thomas Everett, Sidharth Pancholi
  • Publication number: 20240160909
    Abstract: Methods, systems, and apparatus, including computer-readable media, are described for a hardware circuit configured to implement a neural network. The circuit includes a first memory, respective first and second processor cores, and a shared memory. The first memory provides data for performing computations to generate an output for a neural network layer. Each of the first and second cores include a vector memory for storing vector values derived from the data provided by the first memory. The shared memory is disposed generally intermediate the first memory and at least one core and includes: i) a direct memory access (DMA) data path configured to route data between the shared memory and the respective vector memories of the first and second cores and ii) a load-store data path configured to route data between the shared memory and respective vector registers of the first and second cores.
    Type: Application
    Filed: January 25, 2024
    Publication date: May 16, 2024
    Inventors: Thomas Norrie, Andrew Everett Phelps, Norman Paul Jouppi, Matthew Leever Hedlund
  • Patent number: 11932332
    Abstract: An example robot includes a first actuator and a second actuator connecting a first portion of a first member of the robot to a second member of the robot. Extension of the first actuator accompanied by retraction of the second actuator causes the first member to roll in a first roll direction. Retraction of the first actuator accompanied by extension of the second actuator causes the first member to roll in a second roll direction. A third actuator connects a second portion of the first member to the second member. Extension of the third actuator accompanied by retraction of both the first and second actuators causes the first member to pitch in a first pitch direction. Retraction of the third actuator accompanied by extension of both the first and second actuators causes the first member to pitch in a second pitch direction.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: March 19, 2024
    Assignee: Boston Dynamics, Inc.
    Inventors: Christopher Everett Thorne, John Aaron Saunders, Marco da Silva, Thomas H. Miller, Alexander Douglas Perkins
  • Patent number: 11934826
    Abstract: Methods, systems, and apparatus, including computer-readable media, are described for performing vector reductions using a shared scratchpad memory of a hardware circuit having processor cores that communicate with the shared memory. For each of the processor cores, a respective vector of values is generated based on computations performed at the processor core. The shared memory receives the respective vectors of values from respective resources of the processor cores using a direct memory access (DMA) data path of the shared memory. The shared memory performs an accumulation operation on the respective vectors of values using an operator unit coupled to the shared memory. The operator unit is configured to accumulate values based on arithmetic operations encoded at the operator unit. A result vector is generated based on performing the accumulation operation using the respective vectors of values.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: March 19, 2024
    Assignee: Google LLC
    Inventors: Thomas Norrie, Gurushankar Rajamani, Andrew Everett Phelps, Matthew Leever Hedlund, Norman Paul Jouppi
  • Patent number: 11922292
    Abstract: Methods, systems, and apparatus, including computer-readable media, are described for a hardware circuit configured to implement a neural network. The circuit includes a first memory, respective first and second processor cores, and a shared memory. The first memory provides data for performing computations to generate an output for a neural network layer. Each of the first and second cores include a vector memory for storing vector values derived from the data provided by the first memory. The shared memory is disposed generally intermediate the first memory and at least one core and includes: i) a direct memory access (DMA) data path configured to route data between the shared memory and the respective vector memories of the first and second cores and ii) a load-store data path configured to route data between the shared memory and respective vector registers of the first and second cores.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: March 5, 2024
    Assignee: Google LLC
    Inventors: Thomas Norrie, Andrew Everett Phelps, Norman Paul Jouppi, Matthew Leever Hedlund
  • Publication number: 20090023056
    Abstract: A battery pack thermal management system for use in an electric car. The battery pack thermal management system includes a plurality of thermistors connected to a plurality of cells of a battery pack. A battery monitor board is connected to the thermistors. The system also includes a manifold and a plurality of cooling tubes connected to the manifold. A tube seal plug is arranged over an end of the cooling tube and an end fitting is arranged on an end of the cooling tube. The thermal management system will cool the battery pack to predetermined temperatures to increase the longevity of the battery pack within the electric vehicle.
    Type: Application
    Filed: July 18, 2007
    Publication date: January 22, 2009
    Applicant: TESLA MOTORS, INC.
    Inventors: Daniel T. Adams, Gene Berdichevsky, Thomas Everett Colson, Arthur Hebert, Scott Kohn, David Lyons, Noel Jason Mendez, Jeffrey Brian Straubel, Dorian West, Andrew Simpson
  • Publication number: 20040019475
    Abstract: 1 TABLE 1 Named Note EQ Freq Named Note EQ Freq D1 37.71 E4 329.6 Eb1 38.9 F4 349.2 E1 41.2 Gb4 370 F1 43.65 G4 392 Gb1 46.25 Ab4 415.3 G1 49 A4 440 Ab1 51.9 Bb4 466.2 A1 55 B4 493.9 Bb1 58.2 C5 523.3 B1 61.7 Db5 554.4 C1 65.4 D5 587.3 Db1 69.3 Eb5 622.3 D2 73.42 E5 659.3 Eb2 77.8 F5 698.5 E2 82.41 Gb5 740 F2 87.31 G5 784 Gb2 92.5 Ab5 830.6 G2 98 A5 880 Ab2 103.8 Bb5 932.3 A2 110 B5 987.8 Bb2 116.5 C6 1047 B2 123.5 Db6 1109 C3 130.8 D6 1175 Db3 138.6 Eb6 1245 D3 146.8 E6 1319 Eb3 155.6 F6 1397 E3 164.8 Gb6 1480 F3 174.6 G6 1568 Gb3 185 Ab6 1661 G3 196 A6 1760 Ab3 207.7 Bb6 1865 A3 220 B6 1976 Bb3 233.1 C6 2094 B3 246.9 Db6 2218 C4 261.6 Db4 277.2 D4 293.7 Eb4 311.
    Type: Application
    Filed: May 6, 2002
    Publication date: January 29, 2004
    Inventors: John Donald Bloom, Thomas Everett O'Neal
  • Patent number: 6454197
    Abstract: Tension is controlled in a recording medium fed from a roll by detecting a rotational velocity of the roll as the recording medium is fed, and applying a torque to the roll to maintain tension in the recording medium. The torque applied by the motor is controlled based on the rotational velocity of the roll.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: September 24, 2002
    Assignee: ECRM, Inc.
    Inventor: Thomas A. Everett