Patents by Inventor Thomas A. Kocian
Thomas A. Kocian has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10315918Abstract: Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.Type: GrantFiled: August 3, 2016Date of Patent: June 11, 2019Assignee: RAYTHEON COMPANYInventors: Roland W. Gooch, Buu Q. Diep, Stephen H. Black, Thomas A. Kocian, Adam M. Kennedy
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Patent number: 10262913Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.Type: GrantFiled: April 2, 2018Date of Patent: April 16, 2019Assignee: RAYTHEON COMPANYInventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
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Publication number: 20180226309Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.Type: ApplicationFiled: April 2, 2018Publication date: August 9, 2018Inventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
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Patent number: 9966320Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.Type: GrantFiled: September 20, 2016Date of Patent: May 8, 2018Assignee: RAYTHEON COMPANYInventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
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Publication number: 20170011977Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.Type: ApplicationFiled: September 20, 2016Publication date: January 12, 2017Inventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
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Patent number: 9520332Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.Type: GrantFiled: June 10, 2015Date of Patent: December 13, 2016Assignee: RAYTHEON COMPANYInventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
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Publication number: 20160340179Abstract: Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.Type: ApplicationFiled: August 3, 2016Publication date: November 24, 2016Inventors: Roland W. Gooch, Buu Q. Diep, Stephen H. Black, Thomas A. Kocian, Adam M. Kennedy
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Patent number: 9427776Abstract: Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.Type: GrantFiled: November 29, 2012Date of Patent: August 30, 2016Assignee: RAYTHEON COMPANYInventors: Roland W. Gooch, Buu Q. Diep, Stephen H. Black, Thomas A. Kocian, Adam M. Kennedy
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Patent number: 9227839Abstract: A structure for detecting electromagnetic radiation having a predetermined wavelength. The structure includes a device wafer having a sensing element disposed on a predetermined region of a surface of the device wafer responsive to the electromagnetic radiation. A cover wafer is provided having a region thereof transparent to the electromagnetic radiation for passing the electromagnetic radiation through the transparent region onto a surface of the sensing element. A bond gap spacer structure is provided for supporting the surface of the sensing element from an opposing surface of the transparent region of the cover wafer a distance less than a fraction of the predetermined wavelength when the cover wafer is bonded to the device wafer.Type: GrantFiled: May 6, 2014Date of Patent: January 5, 2016Assignee: RAYTHEON COMPANYInventors: Roland W. Gooch, Stephen H. Black, Thomas A. Kocian, Adam M. Kennedy, Buu Q. Diep
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Publication number: 20150321905Abstract: A structure for detecting electromagnetic radiation having a predetermined wavelength. The structure includes a device wafer having a sensing element disposed on a predetermined region of a surface of the device wafer responsive to the electromagnetic radiation. A cover wafer is provided having a region thereof transparent to the electromagnetic radiation for passing the electromagnetic radiation through the transparent region onto a surface of the sensing element. A bond gap spacer structure is provided for supporting the surface of the sensing element from an opposing surface of the transparent region of the cover wafer a distance less than a fraction of the predetermined wavelength when. the cover wafer is bonded to the device wafer.Type: ApplicationFiled: May 6, 2014Publication date: November 12, 2015Applicant: RAYTHEON COMPANYInventors: Roland W. Gooch, Stephen H. Black, Thomas A. Kocian, Adam M. Kennedy, Buu Q. Diep
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Publication number: 20150279755Abstract: An electronic device and methods of manufacture thereof. One or more methods may include providing a lid wafer having a cavity and a surface surrounding the cavity and a device wafer having a detector device and a reference device. In certain examples, a solder barrier layer of titanium material may be deposited onto the surface of the lid wafer. The solder barrier layer of titanium material may further be activated to function as a getter. In various examples, the lid wafer and the device wafer may be bonded together using solder, and the solder barrier layer of titanium material may prevent the solder from contacting the surface of the lid wafer.Type: ApplicationFiled: June 10, 2015Publication date: October 1, 2015Inventors: Roland W. Gooch, Buu Q. Diep, Adam M. Kennedy, Stephen H. Black, Thomas A. Kocian
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Patent number: 9132496Abstract: In certain embodiments, a system includes a deposition system and a plasma/bonding system. The deposition system deposits a solder outwardly from a substrate of a number of substrates. The plasma/bonding system comprises a plasma system configured to plasma clean the substrate and a bonding system configured to bond the substrates. The plasma/bonding system at least reduces reoxidation of the solder. In certain embodiments, a method comprises depositing solder outwardly from a substrate, removing metal oxide from the substrate, and depositing a capping layer outwardly from the substrate to at least reduce reoxidation of the solder.Type: GrantFiled: August 26, 2014Date of Patent: September 15, 2015Assignee: Raytheon CompanyInventors: Buu Q. Diep, Thomas A. Kocian, Roland W. Gooch
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Patent number: 9022584Abstract: According to one embodiment, a method includes receiving a light beam at an anti-reflective layer of optically transmissive material. The anti-reflective layer has an outer surface disposed within a recess of a protective layer of optically transmissive material, such that the outer surface is protected by the recess and the protective layer from being contacted. The outer surface is further disposed along an optical path of an optical device disposed inwardly from the outer surface. The anti-reflective layer has an average cross-sectional thickness that is less than an average cross-sectional thickness of the protective layer. The method further includes modulating the light beam using the anti-reflective layer.Type: GrantFiled: November 21, 2011Date of Patent: May 5, 2015Assignee: Raytheon CompanyInventors: Stephen H. Black, Thomas A. Kocian, Buu Q. Diep
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Publication number: 20150076216Abstract: In certain embodiments, a system includes a deposition system and a plasma/bonding system. The deposition system deposits a solder outwardly from a substrate of a number of substrates. The plasma/bonding system comprises a plasma system configured to plasma clean the substrate and a bonding system configured to bond the substrates. The plasma/bonding system at least reduces reoxidation of the solder. In certain embodiments, a method comprises depositing solder outwardly from a substrate, removing metal oxide from the substrate, and depositing a capping layer outwardly from the substrate to at least reduce reoxidation of the solder.Type: ApplicationFiled: August 26, 2014Publication date: March 19, 2015Applicant: Raytheon CompanyInventors: Buu Q. Diep, Thomas A. Kocian, Roland W. Gooch
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Patent number: 8844793Abstract: In certain embodiments, a system includes a deposition system and a plasma/bonding system. The deposition system deposits a solder outwardly from a substrate of a number of substrates. The plasma/bonding system comprises a plasma system configured to plasma clean the substrate and a bonding system configured to bond the substrates. The plasma/bonding system at least reduces reoxidation of the solder. In certain embodiments, a method comprises depositing solder outwardly from a substrate, removing metal oxide from the substrate, and depositing a capping layer outwardly from the substrate to at least reduce reoxidation of the solder.Type: GrantFiled: September 13, 2011Date of Patent: September 30, 2014Assignee: Raytheon CompanyInventors: Buu Diep, Thomas A. Kocian, Roland W. Gooch
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Patent number: 8809784Abstract: In accordance with particular embodiments, a method for packaging an incident radiation detector includes depositing an opaque solder resistant material on a first surface of a transparent lid substrate configured to cover at least one detector. The method also includes forming at least one cavity in the lid substrate. The method further includes forming a first portion of at least one hermetic seal ring on the opaque solder resistant material. The first portion of each hermetic seal ring surrounds a perimeter of a corresponding cavity in the lid substrate. The method also includes aligning the first portion of the at least one hermetic seal ring with a second portion of the at least one hermetic seal ring. The method additionally includes bonding the first portion of the at least one hermetic seal ring with the second portion of the at least one hermetic seal ring with solder.Type: GrantFiled: October 18, 2011Date of Patent: August 19, 2014Assignee: Raytheon CompanyInventors: Roland W. Gooch, Stephen H. Black, Thomas A. Kocian, Buu Diep
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Publication number: 20140053966Abstract: Methods for reducing wafer bow induced by an anti-reflective coating of a cap wafer are provided. The method may utilize a shadow mask having at least one opening therein that is positioned opposite recessed regions in a cap wafer. The method may further include depositing at least one layer of an anti-reflective coating material through the shadow mask onto a planar side of a cap wafer to provide a discontinuous coating on the planar side.Type: ApplicationFiled: November 29, 2012Publication date: February 27, 2014Applicant: Raytheon CompanyInventors: Roland W. Gooch, Buu Q. Diep, Stephen H. Black, Thomas A. Kocian, Adam M. Kennedy
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Patent number: 8608894Abstract: A method for manufacturing a wafer level packaged focal plane array, in accordance with certain embodiments, includes forming a detector wafer, which may include forming detector arrays and read-out circuits. The method may also include forming a lid wafer. Forming the lid wafer may include polishing a surface of a magnetically confined Czochralski (MCZ) wafer, bonding a Czochralski wafer to the MCZ wafer, and forming pockets in the Czochralski wafer. Each pocked may expose a portion of the polished surface of the MCZ wafer. The method may further include bonding the lid wafer and the detector wafer together such that the each detector array and read-out circuit are sealed within a different pocket, thereby forming a plurality of wafer level packaged focal plane arrays. The method may additionally include separating at least one wafer level packaged focal plan array from the plurality of wafer level packaged focal plane arrays.Type: GrantFiled: November 17, 2011Date of Patent: December 17, 2013Assignee: Raytheon CompanyInventors: Stephen H. Black, Thomas A. Kocian
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Publication number: 20120139072Abstract: A method for manufacturing a wafer level packaged focal plane array, in accordance with certain embodiments, includes forming a detector wafer, which may include forming detector arrays and read-out circuits. The method may also include forming a lid wafer. Forming the lid wafer may include polishing a surface of a magnetically confined Czochralski (MCZ) wafer, bonding a Czochralski wafer to the MCZ wafer, and forming pockets in the Czochralski wafer. Each pocked may expose a portion of the polished surface of the MCZ wafer. The method may further include bonding the lid wafer and the detector wafer together such that the each detector array and read-out circuit are sealed within a different pocket, thereby forming a plurality of wafer level packaged focal plane arrays. The method may additionally include separating at least one wafer level packaged focal plan array from the plurality of wafer level packaged focal plane arrays.Type: ApplicationFiled: November 17, 2011Publication date: June 7, 2012Applicant: Raytheon CompanyInventors: Stephen H. Black, Thomas A. Kocian
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Publication number: 20120127579Abstract: According to one embodiment, a method includes receiving a light beam at an anti-reflective layer of optically transmissive material. The anti-reflective layer has an outer surface disposed within a recess of a protective layer of optically transmissive material, such that the outer surface is protected by the recess and the protective layer from being contacted. The outer surface is further disposed along an optical path of an optical device disposed inwardly from the outer surface. The anti-reflective layer has an average cross-sectional thickness that is less than an average cross-sectional thickness of the protective layer. The method further includes modulating the light beam using the anti-reflective layer.Type: ApplicationFiled: November 21, 2011Publication date: May 24, 2012Applicant: Raytheon CompanyInventors: Stephen H. Black, Thomas A. Kocian, Buu Q. Diep