Patents by Inventor Thomas A. Ponnuswamy

Thomas A. Ponnuswamy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7247554
    Abstract: The present invention generally relates to methods used for fabricating integrated circuits (“ICs”), using Ruthenium (“Ru”) and its oxides and/or Iridium (“Ir”) and its oxides as the diffusion barrier to contain and control copper (“Cu”) interconnects. The invention also covers ICs incorporating such materials in the diffusion barrier to contain and control the Cu interconnects. The present invention advantageously provides better integration and fabrication of advanced IC chips with sub-micron features.
    Type: Grant
    Filed: June 20, 2003
    Date of Patent: July 24, 2007
    Assignee: University of North Texas
    Inventors: Oliver Chyan, Thomas Ponnuswamy
  • Patent number: 6755954
    Abstract: An apparatus for electrochemical treatment of a substrate, in particular for electroplating an integrated circuit wafer. An apparatus preferably includes dynamically operable concentric anodes and dielectric shields in an electrochemical bath. Preferably, the bath height of an electrochemical bath, the substrate height, and the shape and positions of an insert shield and a diffuser shield are dynamically variable during electrochemical treatment operations. Step include varying anode current, bath height and substrate height, shield shape, and shield position.
    Type: Grant
    Filed: April 4, 2002
    Date of Patent: June 29, 2004
    Assignee: Novellus Systems, Inc.
    Inventors: Steven T. Mayer, Timothy Patrick Cleary, Michael John Janicki, Edmund B. Minshall, Thomas A. Ponnuswamy
  • Publication number: 20040051117
    Abstract: The present invention generally relates to methods used for fabricating integrated circuits (“ICs”), using Ruthenium (“Ru”) and its oxides and/or Iridium (“Ir”) and its oxides as the diffusion barrier to contain and control copper (“Cu”) interconnects. The invention also covers ICs incorporating such materials in the diffusion barrier to contain and control the Cu interconnects. The present invention advantageously provides better integration and fabrication of advanced IC chips with sub-micron features.
    Type: Application
    Filed: June 20, 2003
    Publication date: March 18, 2004
    Inventors: Oliver Chyan, Thomas Ponnuswamy
  • Publication number: 20020195352
    Abstract: An apparatus for electrochemical treatment of a substrate, in particular for electroplating an integrated circuit wafer. An apparatus preferably includes dynamically operable concentric anodes and dielectric shields in an electrochemical bath. Preferably, the bath height of an electrochemical bath, the substrate height, and the shape and positions of an insert shield and a diffuser shield are dynamically variable during electrochemical treatment operations. Step include varying anode current, bath height and substrate height, shield shape, and shield position.
    Type: Application
    Filed: April 4, 2002
    Publication date: December 26, 2002
    Inventors: Steven T. Mayer, Timothy Patrick Cleary, Michael John Janicki, Edmund B. Minshall, Thomas A. Ponnuswamy